參數(shù)資料
型號(hào): MC16V1CPU20B1
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 18/128頁
文件大?。?/td> 571K
代理商: MC16V1CPU20B1
MOTOROLA
MC68HC16V1
114
MC68HC16V1TS/D
6 General-Purpose Timer Module
The GPT is a simple, yet flexible 9-channel timer used in systems where a moderate degree of external
visibility and control is required. The GPT consists of a capture/compare unit, a pulse accumulator, and
a prescaler. A bus interface unit connects the GPT to the intermodule bus. Figure 20 shows a block
diagram of the GPT.
NOTE
On the MC68HC16V1, the external clock input signal (PCLK) is tied so that a log-
ical zero is indicated as the pin state under any condition.
Figure 20 GPT Block Diagram
6.1 Overview
The capture/compare unit features three input capture channels, four output compare channels, and
one selectable input capture/output compare channel. These channels share a 16-bit free-running
counter (TCNT) which derives its clock from a nine-state prescaler.
Pulse accumulator channel logic includes an 8-bit counter. The pulse accumulator can operate in either
event counting mode or gated time accumulation mode.
All GPT pins can also be used for general-purpose input/output. The input capture and output compare
pins form a bidirectional 8-bit parallel port (PORTGP).
GPT input capture/output compare pins are bidirectional and can be used to form an 8-bit parallel port.
V1 GPT BLOCK
PULSE ACCUMULATOR
BUS INTERFACE
IMB
CAPTURE/COMPARE UNIT
PRESCALER*
IC1/PGP0
IC2/PGP1
IC3/PGP2
PAI
IC4/OC5/OC1/PGP7
OC4/OC1/PGP6
OC3/OC1/PGP5
OC2/OC1/PGP4
OC1/PGP3
* SOME VERSIONS OF THE GPT CAN USE AN EXTERNAL CLOCK SOURCE. HOWEVER, THE GPT
EXTERNAL CLOCK INPUT SIGNAL (PCLK) IN THIS MCU IS NOT BONDED TO AN EXTERNAL PIN.
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