![](http://datasheet.mmic.net.cn/330000/MBM29LV008B-X_datasheet_16439003/MBM29LV008B-X_3.png)
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MBM29LV008T-X/MBM29LV008B-X
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DESCRIPTION
The MBM29LV008T-X/B-X are an 8M-bit, 3.0 V-only Flash memory organized as 1M bytes of 8 bits each. The
MBM29LV008T-X/B-X are offered in a 40-pin TSOP package. These devices are designed to be programmed
in-system with the standard system 3.0 V V
CC
supply. 12.0 V V
operations. The devices can also be reprogrammed in standard EPROM programmers.
PP
and 5.0 V V
CC
are not required for write or erase
The standard MBM29LV008T-X/B-X offer access times 120 ns and 150 ns, allowing operation of high-speed
microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE), write
enable (WE), and output enable (OE) controls.
The MBM29LV008T-X/B-X are pin and command set compatible with JEDEC standard E
are written to the command register using standard microprocessor write timings. Register contents serve as
input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally
latch addresses and data needed for the programming and erase operations. Reading data out of the device is
similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.
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PROMs. Commands
The MBM29LV008T-X/B-X are programmed by executing the program command sequence. This will invoke the
Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.6 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the device automatically times the erase pulse widths and
verifies proper cell margin.
Any individual sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)
These devices also feature a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29LV008T-X/B-X are erased when shipped from the
factory.
The device features single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low V
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ
by the Toggle Bit l feature on DQ
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, or the RY/BY output pin. Once the end of a program or erase cycle has been
completed, the device internally resets to the read mode.
CC
detector automatically
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,
Fujitsu’s Flash technology combines years of EPROM and E
of quality, reliability, and cost effectiveness. The MBM29LV008T-X/B-X memories electrically erase the entire
chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed
one byte/word at a time using the EPROM programming mechanism of hot electron injection.
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PROM experience to produce the highest levels