參數(shù)資料
型號(hào)： MB91F267APMC-GE1
廠商： Fujitsu Semiconductor America Inc
文件頁(yè)數(shù)： 47/53頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝： 1
系列： FR MB91265A
核心處理器： FR60Lite RISC
芯體尺寸： 32-位
速度： 33MHz
連通性： UART/USART
外圍設(shè)備： DMA，WDT
輸入/輸出數(shù)： 49
程序存儲(chǔ)器容量： 128KB（128K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 11x8/10b
振蕩器型： 外部
工作溫度： -40°C ~ 105°C
封裝/外殼： 64-LQFP
包裝： 托盤
其它名稱： 865-1092
54
8183F–AVR–06/12
ATtiny24A/44A/84A
10.1
Ports as General Digital I/O
The ports are bi-directional I/O ports with optional internal pull-ups. Figure 10-2 shows a func-
tional description of one I/O-port pin, here generically called Pxn.
Figure 10-2.
General Digital I/O
Note:
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clkI/O,
SLEEP, and PUD are common to all ports.
10.1.1
Configuring the Pin
Each port pin consists of three register bits: DDxn, PORTxn, and PINxn. As shown in “Register
Description” on page 66, the DDxn bits are accessed at the DDRx I/O address, the PORTxn bits
at the PORTx I/O address, and the PINxn bits at the PINx I/O address.
The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written logic one,
Pxn is configured as an output pin. If DDxn is written logic zero, Pxn is configured as an input
pin.
If PORTxn is written logic one when the pin is configured as an input pin, the pull-up resistor is
activated. To switch the pull-up resistor off, PORTxn has to be written logic zero or the pin has to
be configured as an output pin. The port pins are tri-stated when reset condition becomes active,
even if no clocks are running.
If PORTxn is written logic one when the pin is configured as an output pin, the port pin is driven
high (one). If PORTxn is written logic zero when the pin is configured as an output pin, the port
pin is driven low (zero).
clk
RPx
RRx
RDx
WDx
PUD
SYNCHRONIZER
WDx:
WRITE DDRx
WRx:
WRITE PORTx
RRx:
READ PORTx REGISTER
RPx:
READ PORTx PIN
PUD:
PULLUP DISABLE
clk
I/O:
I/O CLOCK
RDx:
READ DDRx
D
L
Q
RESET
Q
D
Q
D
CLR
PORTxn
Q
D
CLR
DDxn
PINxn
D
ATA
B
U
S
SLEEP
SLEEP:
SLEEP CONTROL
Pxn
I/O
WPx
0
1
WRx
WPx:
WRITE PINx REGISTER
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB91F267APMC-GS 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91F267APMC-GSE1 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91F267N 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller
MB91F267NA 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91F267NAPMC-G 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
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