參數(shù)資料
型號(hào)： MB91F267APMC-GE1
廠商： Fujitsu Semiconductor America Inc
文件頁(yè)數(shù)： 36/53頁(yè)
文件大小： 0K
描述： IC MCU FLASH 128KB FLASH 64LQFP
標(biāo)準(zhǔn)包裝： 1
系列： FR MB91265A
核心處理器： FR60Lite RISC
芯體尺寸： 32-位
速度： 33MHz
連通性： UART/USART
外圍設(shè)備： DMA，WDT
輸入/輸出數(shù)： 49
程序存儲(chǔ)器容量： 128KB（128K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 11x8/10b
振蕩器型： 外部
工作溫度： -40°C ~ 105°C
封裝/外殼： 64-LQFP
包裝： 托盤(pán)
其它名稱(chēng)： 865-1092
44
8183F–AVR–06/12
ATtiny24A/44A/84A
8.5
Register Description
8.5.1
MCUSR – MCU Status Register
The MCU Status Register provides information on which reset source caused an MCU Reset.
Bits 7:4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny24A/44A/84A and will always read as zero.
Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then reset
the MCUSR as early as possible in the program. If the register is cleared before another reset
occurs, the source of the reset can be found by examining the Reset Flags.
8.5.2
WDTCSR – Watchdog Timer Control and Status Register
Bit 7 – WDIF: Watchdog Timeout Interrupt Flag
This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is config-
ured for interrupt. WDIF is cleared by hardware when executing the corresponding interrupt
handling vector. Alternatively, WDIF is cleared by writing a logic one to the flag. When the I-bit in
SREG and WDIE are set, the Watchdog Time-out Interrupt is executed.
Bit 6 – WDIE: Watchdog Timeout Interrupt Enable
When this bit is written to one, WDE is cleared, and the I-bit in the Status Register is set, the
Watchdog Time-out Interrupt is enabled. In this mode the corresponding interrupt is executed
instead of a reset if a timeout in the Watchdog Timer occurs.
If WDE is set, WDIE is automatically cleared by hardware when a time-out occurs. This is useful
for keeping the Watchdog Reset security while using the interrupt. After the WDIE bit is cleared,
Bit
7
6
543210
–
WDRF
BORF
EXTRF
PORF
MCUSR
Read/Write
RRRR
R/W
Initial Value
0
See Bit Description
Bit
765
432
10
WDIF
WDIE
WDP3
WDCE
WDE
WDP2
WDP1
WDP0
WDTCSR
Read/Write
R/W
Initial Value
0
X
0
相關(guān)PDF資料
PDF描述
ADUC7034BCPZ-RL IC MCU FLASH 32K ANLG IO 48LFCSP
ADUC7126BSTZ126IRL IC MCU 16/32B 126KB FLASH 80LQFP
AT91SAM7S256C-MU-999 IC MCU ARM7 256KB FLASH 64-VQFN
AT90USB1287-MUR MCU AVR 128K FLASH 16MHZ 64QFN
AT90USB1287-AUR MCU AVR 128K FLASH 16MHZ 64TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB91F267APMC-GS 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91F267APMC-GSE1 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91F267N 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller
MB91F267NA 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91F267NAPMC-G 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*