參數(shù)資料
型號： MB90F395HAPMT
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件頁數(shù)： 14/72頁
文件大小： 1734K
代理商： MB90F395HAPMT
21
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.3
Fig. 8.3.4 Interrupt Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt control register 1 (ICON1) [Address 00FE16]
BNameFunctions
After reset RW
Interrupt Control Register 1
0
Timer 1 interrupt
enable bit (TM1E)
0 : Interrupt disabled
1 : Interrupt enabled
1
Timer 2 interrupt
enable bit (TM2E)
2
Timer 3 interrupt
enable bit (TM3E)
3
4
OSD interrupt enable bit
(OSDE)
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0
RW
R—
7
Nothing is assigned. This bit is a write disable
bit. When this bit is read out, the value is “0.”
Timer 4 interrupt
enable bit (TM4E)
0 : Interrupt disabled
1 : Interrupt enabled
5
VSYNC interrupt enable
bit (VSCE)
0 : Interrupt disabled
1 : Interrupt enabled
0R W
6
INT3 external interrupt
enable bit (IN3E)
0 : Interrupt disabled
1 : Interrupt enabled
0R W
Fig. 8.3.5 Interrupt Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt control register 2 (ICON2) [Address 00FF16]
BNameFunctions
After reset RW
Interrupt Control Register 2
0
INT1 external interrupt
enable bit (IN1E)
0 : Interrupt disabled
1 : Interrupt enabled
1
Data slicer interrupt
enable bit (DSE)
2
Serial I/O interrupt
enable bit (S1E)
3
4
INT2 external interrupt
enable bit (IN2E)
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0
RW
f(XIN)/4096 interrupt
enable bit (CKE)
0 : Interrupt disabled
1 : Interrupt enabled
5
Multi-master I2C-BUS
interface interrupt enable
bit (IICE)
0 : Interrupt disabled
1 : Interrupt enabled
0R W
6
Timer 5 6 interrupt
enable bit (TM56E)
0 : Interrupt disabled
1 : Interrupt enabled
0R W
7
Timer 5 6 interrupt
switch bit (TM56C)
0 : Timer 5
1 : Timer 6
0R W
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