參數(shù)資料
型號(hào)： MB90F395HAPMT
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件頁數(shù)： 11/72頁
文件大?。?/td> 1734K
代理商： MB90F395HAPMT
19
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.3
(4) Serial I/O interrupt
This is an interrupt request from the clock synchronous serial I/O
function.
(5) f(XIN)/4096 interrupt
The f (XIN)/4096 interrupt occurs regularly with a f(XIN)/4096 pe-
riod. Set bit 0 of the PWM mode register 1 to “0.”
(6) Data slicer interrupt
An interrupt occurs when slicing data is completed.
(7) Multi-master I2C-BUS interface interrupt
This is an interrupt request related to the multi-master I2C-BUS
interface.
(8) Timer 5 6 interrupt
An interrupt is generated by an overflow of timer 5 or 6. Their
priorities are same, and can be switched by software.
(9) BRK instruction interrupt
This software interrupt has the least significant priority. It does
not have a corresponding interrupt enable bit, and it is not af-
fected by the interrupt disable flag I (non-maskable).
Fig. 8.3.1 Interrupt Control
Interrupt request bit
Interrupt enable bit
Interrupt disable flag I
BRK instruction
Reset
Interrupt
request
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