參數(shù)資料
型號: MB8118160A-70
廠商: Fujitsu Limited
英文描述: CMOS 1M×16 BIT Fast Page Mode Dynamic RAM(CMOS 1M×16 位快速頁面存取模式動態(tài)RAM)
中文描述: 的CMOS 100萬× 16位快速頁面模式動態(tài)RAM的CMOS(100萬× 16位快速頁面存取模式動態(tài)內(nèi)存)
文件頁數(shù): 13/26頁
文件大?。?/td> 494K
代理商: MB8118160A-70
13
MB8118160A-60/MB8118160A-70
“H” or “L”
DESCRIPTION
A write cycle is similar to a read cycle except WE is set to a Low state and OE is an “H” or “L” signal. A write cycle can
be implemented in either of three ways - early write, delayed write, or read-modify-write. During all write cycles, timing
parameters t
RWL
, t
CWL
, t
RAL
and t
CAL
must be satisfied. In the early write cycle shown above t
WCS
satisfied, data on the DQ
pins are latched with the falling edge of LCAS or UCAS and written into memory.
Fig. 6 – EARLY WRITE CYCLE (OE = “H” or “L”)
COLUMN ADD
t
RC
t
RAS
ROW ADD
HIGH-Z
VALID DATA IN
t
CSH
t
RP
t
RSH
t
RCD
t
CRP
t
CAS
t
AR
t
ASR
t
RAH
t
ASC
t
CAH
t
WCR
t
WCS
t
WCH
t
DHR
t
DS
t
DH
RAS
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
LCAS
or
UCAS
WE
DQ
(Input)
A
0
to A
9
V
OH
V
OL
DQ
(Output)
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