參數(shù)資料
型號(hào): M68HC001
廠商: Motorola, Inc.
英文描述: 16-/32-Bit Microprocessor(16/32位微處理器)
中文描述: 16/32位微處理器(16/32位微處理器)
文件頁(yè)數(shù): 96/184頁(yè)
文件大小: 1006K
代理商: M68HC001
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MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL
6-11
Table 6-4. MC68010 Format Codes
Format Code
Stacked Information
0000
Short Format (4 Words)
1000
Long Format (29 Words)
All Others
Unassigned, Reserved
6.2.5 Exception Processing Sequence
In the first step of exception processing, an internal copy is made of the status register.
After the copy is made, the S bit of the status register is set, putting the processor into the
supervisor mode. Also, the T bit is cleared, which allows the exception handler to execute
unhindered by tracing. For the reset and interrupt exceptions, the interrupt priority mask is
also updated appropriately.
In the second step, the vector number of the exception is determined. For interrupts, the
vector number is obtained by a processor bus cycle classified as an interrupt acknowledge
cycle. For all other exceptions, internal logic provides the vector number. This vector
number is then used to calculate the address of the exception vector.
The third step, except for the reset exception, is to save the current processor status. (The
reset exception does not save the context and skips this step.) The current program
counter value and the saved copy of the status register are stacked using the SSP. The
stacked program counter value usually points to the next unexecuted instruction.
However, for bus error and address error, the value stacked for the program counter is
unpredictable and may be incremented from the address of the instruction that caused the
error. Group 1 and 2 exceptions use a short format exception stack frame (format = 0000
on the MC68010). Additional information defining the current context is stacked for the bus
error and address error exceptions.
The last step is the same for all exceptions. The new program counter value is fetched
from the exception vector. The processor then resumes instruction execution. The
instruction at the address in the exception vector is fetched, and normal instruction
decoding and execution is started.
6.3 PROCESSING OF SPECIFIC EXCEPTIONS
The exceptions are classified according to their sources, and each type is processed
differently. The following paragraphs describe in detail the types of exceptions and the
processing of each type.
6.3.1 Reset
The reset exception corresponds to the highest exception level. The processing of the
reset exception is performed for system initiation and recovery from catastrophic failure.
Any processing in progress at the time of the reset is aborted and cannot be recovered.
The processor is forced into the supervisor state, and the trace state is forced off. The
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