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M68000 USER’S MANUAL
MOTOROLA
LIST OF ILLUSTRATIONS
Figure
Number
Page
Number
Title
2-1
2-2
2-3
2-4
2-5
2-6
2-7
User Programmer's Model ...................................................................................
Supervisor Programmer's Model Supplement .....................................................
Supervisor Programmer's Model Supplement (MC68010) ..................................
Status Register ....................................................................................................
Word Organization In Memory.............................................................................
Data Organization In Memory ..............................................................................
Memory Data Organization (MC68008) ...............................................................
2-2
2-2
2-3
2-3
2-6
2-7
2-3
3-1
3-2
3-3
3-4
3-5
Input and Output Signals (MC68000, MC68HC000, MC68010)..........................
Input and Output Signals ( MC68HC001) ............................................................
Input and Output Signals (MC68EC000) .............................................................
Input and Output Signals (MC68008 48-Pin Version)..........................................
Input and Output Signals (MC68008 52-Pin Version)..........................................
3-1
3-2
3-2
3-3
3-3
4-1
4-2
4-3
4-4
4-5
4-6
Byte Read-Cycle Flowchart..................................................................................
Read and Write-Cycle Timing Diagram................................................................
Byte Write-Cycle Flowchart..................................................................................
Write-Cycle Timing Diagram ................................................................................
Read-Modify-Write Cycle Flowchart ....................................................................
Read-Modify-Write Cycle Timing Diagram...........................................................
4-2
4-2
4-4
4-4
4-6
4-7
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
Word Read-Cycle Flowchart ................................................................................
Byte Read-Cycle Flowchart..................................................................................
Read and Write-Cycle Timing Diagram................................................................
Word and Byte Read-Cycle Timing Diagram .......................................................
Word Write-Cycle Flowchart ................................................................................
Byte Write-Cycle Flowchart..................................................................................
Word and Byte Write-Cycle Timing Diagram .......................................................
Read-Modify-Write Cycle Flowchart ....................................................................
Read-Modify-Write Cycle Timing Diagram...........................................................
CPU Space Address Encoding ............................................................................
Interrupt Acknowledge Cycle Timing Diagram...................................................
Breakpoint Acknowledge Cycle Timing Diagram ...............................................
3-Wire Bus Arbitration Flowchart
(NA to 48-Pin MC68008 and MC68EC000 ........................................................
2-Wire Bus Arbitration Cycle Flowchart .............................................................
5-2
5-2
5-3
5-3
5-5
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14