
Rev.1.00
Oct 26, 2004
page 71 of 79
3883 Group
Table 22 Electrical characteristics
(VCC = 3.3 V
± 0.3V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
“H” output voltage
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P80–P87 (Note)
“L” output voltage
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P70–P77, P80–P87
Hysteresis
CNTR0, CNTR1, INT0, INT1
INT20–INT40, INT21–INT41, INT5
P30–P37, LRESET
LFRAME, LCLK, SERIRQ
“H” input current
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P70–P77, P80–P87
RESET, CNVSS
“H” input current
XIN
“L” input current
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P70–P77, P80–P87
RESET,CNVSS
“L” input current
XIN
“L” input current
P30–P37 (at Pull-up)
RAM hold voltage
Limits
V
A
V
Parameter
Min.
Typ.
Max.
Symbol
Unit
Note: P00–P03 are measured when the P00–P03 output structure selection bit (bit 0 of PCTL1) is “0”.
P04–P07 are measured when the P04–P07 output structure selection bit (bit 1 of PCTL1) is “0”.
P10–P13 are measured when the P10–P13 output structure selection bit (bit 2 of PCTL1) is “0”.
P14–P17 are measured when the P14–P17 output structure selection bit (bit 3 of PCTL1) is “0”.
P42, P43, P44, and P46 are measured when the P4 output structure selection bit (bit 2 of PCTL2) is “0”.
IOH = –5 mA
IOL = 5 mA
IOL = 1.6 mA
VI = VCC
(Pin floating.
Pull-up transistors “off”)
VI = VCC
VI = VSS
(Pin floating.
Pull-up transistors “off”)
VI = VSS
When clock stopped
VCC–1.0
–13
2.0
Test conditions
0.4
3
–3
–50
1.0
0.4
5.0
–5.0
–100
3.6
VOH
VOL
VT+–VT–
IIH
IIL
VRAM