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參數(shù)資料
| 型號： | M38837G6HP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 61/81頁 |
| 文件大?。?/td> | 766K |
| 代理商： | M38837G6HP |
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Rev.1.00
Oct 26, 2004
page 64 of 79
3883 Group
CLOCK GENERATING CIRCUIT
The 3883 group has one built-in oscillation circuit. An oscillation
circuit can be formed by connecting a resonator between XIN and
XOUT Use the circuit constants in accordance with the resonator
manufacturer’s recommended values. No external resistor is
needed between XIN and XOUT since a feedback resistor exists
on-chip.
Immediately after power on, only the XIN oscillation circuit starts
oscillating.
Frequency Control
(1) Middle-speed mode
The internal clock
φ is the frequency of XIN divided by 8. After re-
set, this mode is selected.
(2) High-speed mode
The internal clock
φ is half the frequency of XIN.
sNote
If you switch the mode between middle/high-speed ,stabilize XIN
oscillations.
Oscillation Control
(1) Stop mode
If the STP instruction is executed, the internal clock
φ stops at an
“H” level, and XIN oscillators stop. When the oscillation stabilizing
time set after STP instruction released bit is “0,” the prescaler 12
is set to “FF16” and timer 1 is set to “0116”. When the oscillation
stabilizing time set after STP instruction released bit is “1”, set the
sufficient time for oscillation of used oscillator to stabilize since
nothing is set to the prescaler 12 and timer 1.
XIN divided by 16 is input to the prescaler 12 as count source, and
the output of the prescaler 12 is connected to timer 1. Set the
timer 1 interrupt enable bit to disabled (“0”) before executing the
STP instruction. Oscillator restarts when an external interrupt is
received, but the internal clock
φ is not supplied to the CPU (re-
mains at “H”) until timer 1 underflows. The internal clock
φ is
supplied for the first time, when timer 1 underflows. Therefore
make sure not to set the timer 1 interrupt request bit to “1” before
the STP instruction stops the oscillator. When the oscillator is re-
started by reset, apply “L” level to the RESET pin until the
oscillation is stable since a wait time will not be generated.
(2) Wait mode
If the WIT instruction is executed, the internal clock
φ stops at an
“H” level, but the oscillator does not stop. The internal clock
φ re-
starts at reset or when an interrupt is received. Since the oscillator
does not stop, normal operation can be started immediately after
the clock is restarted.
Fig. 65 Ceramic resonator circuit
Fig. 66 External clock input circuit
XIN
XOUT
CIN
COUT
XIN
XOUT
Open
External oscillation
circuit
VCC
VSS
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相關(guān)代理商/技術(shù)參數(shù) |
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| M3883-BK001 | 制造商:Alpha Wire 功能描述: |
| M3883-BK002 | 制造商:Alpha Wire 功能描述: |
| M3883-BK005 | 制造商:Alpha Wire 功能描述: |
| M3883-BK199 | 制造商:Alpha Wire 功能描述: |
| M3883-BLACK-100 | 制造商:Alpha Wire 功能描述: |
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