Rev.2.00
Aug 28, 2006
page 45 of 119
7643 Group
REJ03B0054-0200
Set the USB resume signal interrupt status flag to “0” after the
wake-up sequence process. The USB resume detect flag goes to
“0” at the same time. When the clock operation is started up with
a remote wake-up, set the USB remote wake-up bit to “1” after the
wake-up sequence process. (keep it set to “1” for a minimum of 10
ms and maximum of 15 ms). By doing this, the MCU will send a
resume signal to the host CPU and let it know that the suspend
state has been released.
After that, set the USB remote wake-up bit and the USB suspend
detection flag to “0”, because the USB suspend detection flag is
not automatically cleared to “0” with a remote wake-up.
[USB Control Register] USBC
“1”. The USB line driver supply bit must be set to “0” (DC-DC con-
verter is disabled) when operating at Vcc = 3.3V. In this condition,
the setting of the USB line driver current control bit has no effect
on USB operations.
Fig. 35 Structure of USB control register
USB control register (address 001316)
USBC
Reserved bit (“0” at read/write)
USB default state selection bit (USBC1)
0: In default state after power-on/reset
1: In default state after USB reset signal received
Reserved bit (“0” at read/write)
USB line driver current control bit (USBC3)
0: High current mode
1: Low current mode
USB line driver supply enable bit (USBC4) (Note 1)
0: Line driver disabled
1: Line driver enabled
USB clock enable bit (USBC5)
0: 48 MHz clock to the USB block disabled
1: 48 MHz clock to the USB block enabled
Reserved bit (“0” at read/write)
USB enable bit (USBC7)
0: USB block disabled (Note 2)
1: USB block enabled
Notes 1: When using the MCU in Vcc = 3.3 V, set this bit to “0” and disable the built-in DC-DC converter
2: Setting this bit to 0” causes the contents of all USB registers to have the values at reset.
b0
b7
0