參數(shù)資料
型號(hào): M34552G8HFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù): 80/143頁
文件大小: 0K
代理商: M34552G8HFP
Rev.3.02
Dec 22, 2006
page 4 of 142
REJ03B0023-0302
4552 Group
PERFORMANCE OVERVIEW
Function
123
124
4096 words 10 bits
8192 words 10 bits
288 words 4 bits (including LCD display RAM 28 words 4 bits)
Six independent I/O ports.
Input is examined by skip decision.
The output structure can be switched by software.
Port D5 is also used as INT pin.
Two independent output ports.
Ports D6 and D7 are also used as XCIN and XCOUT, respectively.
4-bit I/O port; A pull-up function, a key-on wakeup function and output structure can be switched
by software. Ports P00–P03 are also used as SEG21–SEG24, respectively.
4-bit I/O port; A pull-up function, a key-on wakeup function and output structure can be switched
by software. Ports P10–P13 are also used as SEG25–SEG28, respectively.
4-bit I/O port; The output structure can be switched by software. Ports P20–P23 are also used
as SEG17–SEG20, respectively.
1-bit output; Port C is also used as CNTR pin.
8-bit programmable timer with a reload register and has an event counter.
8-bit programmable timer with two reload registers and PWM output function.
16-bit timer, fixed dividing frequency (timer for clock count)
4-bit timer with a reload register (for LCD clock)
16-bit timer (fixed dividing frequency) (for watchdog)
1/2, 1/3 bias
2, 3, 4 duty
4
28
2r 3, 2r 2, r 3, r 2 (r = 80 k
, (Ta = 25 °C, Typical value))
4 (one for external, three for timer )
1 level
8 levels
CMOS silicon gate
48-pin plastic molded QFP (48P6S-A)
–20 °C to 85 °C
1.8 to 5.5 V (It depends on operation source clock, oscillation frequency and operation mode)
1.8 to 3.6 V (It depends on operation source clock, oscillation frequency and operation mode)
2.2 mA (at room temperature, VDD = 5 V, f(XIN) = 6 MHz, f(XCIN) = stop, f(RING) = stop,
f(STCK) = f(XIN)/1)
6
A (at room temperature, VDD = 5 V, f(XCIN) = 32 kHz)
0.1
A (at room temperature, VDD = 5 V, output transistor is cut-off state)
Parameter
Number of basic
instructions
Minimum
instruction
execution time
Memory sizes
Input/Output
ports
Timers
LCD control
circuit
Interrupt
Subroutine nesting
Device structure
Package
Operating temperature range
Supply
voltage
Power
dissipation
(Typ. value)
M34552M4/M8/G8
M34552M4H/M8H/G8H
ROM
RAM
D0–D5
D6, D7
P00–P03
P10–P13
P20–P23
C
Timer 1
Timer 2
Timer 3
Timer LC
Watchdog timer
Selective bias value
Selective duty value
Common output
Segment output
Internal resistor for
power supply
Sources
Nesting
Mask ROM version
One Time PROM version
Active mode
(Mask ROM version)
At clock operating mode
(Mask ROM version)
At RAM back-up
(Mask ROM version)
I/O
Output
I/O
Output
M34552M4
M34552M4H
M34552M8/G8
M34552M8H/G8H
M34552M4/M8/G8
M34552M4H/M8H/G8H
0.5
s (at 6 MHz oscillation frequency, in high-speed through mode)
0.68
s (at 4.4 MHz oscillation frequency, in high-speed through mode)
Mask ROM version
One Time PROM version
相關(guān)PDF資料
PDF描述
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