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| 型號(hào)： | M34552G8HFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48 |
| 文件頁(yè)數(shù)： | 65/143頁(yè) |
| 文件大小： | 0K |
| 代理商： | M34552G8HFP |
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Rev.3.02
Dec 22, 2006
page 26 of 142
REJ03B0023-0302
4552 Group
Table 8 External interrupt control register
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: When the contents of these bits (I12 , I13) are changed, the external interrupt request flag (EXF0) may be set.
I13
I12
I11
I10
INT pin input control bit (Note 2)
Interrupt valid waveform for INT pin/
return level selection bit (Note 2)
INT pin edge detection circuit control bit
INT pin Timer 1 count start synchronous
circuit selection bit
Interrupt control register I1
R/W
TAI1/TI1A
at power down : state retained
at reset : 00002
INT pin input disabled
INT pin input enabled
Falling waveform/“L” level (“L” level is recognized with the SNZI0
instruction)
Rising waveform/“H” level (“H” level is recognized with the SNZI0
instruction)
One-sided edge detected
Both edges detected
Timer 1 count start synchronous circuit not selected
Timer 1 count start synchronous circuit selected
0
1
0
1
0
1
0
1
(1) External 0 interrupt request flag (EXF0)
External 0 interrupt request flag (EXF0) is set to “1” when a valid
waveform is input to D5/INT pin.
The valid waveforms causing the interrupt must be retained at their
level for 4 clock cycles or more of the system clock (Refer to Figure 16).
The state of EXF0 flag can be examined with the skip instruction
(SNZ0). Use the interrupt control register V1 to select the interrupt
or the skip instruction. The EXF0 flag is cleared to “0” when an in-
terrupt occurs or when the next instruction is skipped with the skip
instruction.
External 0 interrupt activated condition
External 0 interrupt activated condition is satisfied when a valid
waveform is input to D5/INT pin.
The valid waveform can be selected from rising waveform, falling
waveform or both rising and falling waveforms. An example of
how to use the external 0 interrupt is as follows.
Set the bit 3 of register I1 to “1” for the INT pin to be in the input
enabled state.
Select the valid waveform with the bits 1 and 2 of register I1.
Clear the EXF0 flag to “0” with the SNZ0 instruction.
Set the NOP instruction for the case when a skip is performed
with the SNZ0 instruction.
Set both the external 0 interrupt enable bit (V10) and the INTE
flag to “1.”
The external 0 interrupt is now enabled. Now when a valid wave-
form is input to the D5/INT pin, the EXF0 flag is set to “1” and the
external 0 interrupt occurs.
(2) External interrupt control registers
Interrupt control register I1
Register I1 controls the valid waveform for the external 0 inter-
rupt. Set the contents of this register through register A with the
TI1A instruction. The TAI1 instruction can be used to transfer the
contents of register I1 to register A.
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| M34552M4H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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| M34552M8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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