參數(shù)資料
型號: M34552G8HFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù): 21/143頁
文件大?。?/td> 0K
代理商: M34552G8HFP
10: DISPLAY CONFIGURATION
S1D13505F00A HARDWARE FUNCTIONAL
EPSON
1-105
SPECIFICATION (X23A-A-001-12)
10.2 Image Manipulation
The gure below shows how Screen 1 and 2 images are stored in the image buffer and positioned on
the display. Screen 1 and Screen 2 can be parts of a larger virtual image or images.
(REG[17h],REG[16h]) denes the width of the virtual image(s).
(REG[12h],REG[11h],REG[10]) denes the starting word of the Screen 1,
(REG[15h],REG[14h],REG[13]) denes the starting word of the Screen 2.
REG[18h] bits [3:0] dene the starting pixel within the starting word for Screen 1, REG[18h] bits
[7:4] dene the starting pixel within the starting word for Screen 2.
(REG[0Fh],REG[0Eh]) dene the last line of Screen 1, the remainder of the display is taken up by
Screen 2.
Figure 10-3 Image Manipulation
(REG[17h], REG[16h])
(REG[15h], REG[14h], REG[13h])
REG[18h] bits [7:4]
(REG[12h], REG[11h], REG[10h])
REG[18h] bits [3:0]
((REG[04h]+1)*8) pixels
((REG[09h], REG[08h])+1) lines
Screen 2
Screen 1
Line (REG[0Fh], REG[0Eh])
Screen 2
Screen 1
Line 0
Line 1
Display
Image Buffer
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