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參數(shù)資料
| 型號(hào)： | M34506E4FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, MICROCONTROLLER, PDSO20 |
| 封裝： | 5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20 |
| 文件頁數(shù)： | 83/114頁 |
| 文件大小： | 937K |
| 代理商： | M34506E4FP |
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Rev.2.00
Aug 28, 2006
page 68 of 119
7643 Group
REJ03B0054-0200
HOLD Function
The HOLD function is used for systems that consist of external cir-
cuits that access MCU buses without use of the CPU (Central
Processing Unit). The HOLD function is used to generate the tim-
ing in which the MCU will relinquish the bus from the CPU to the
external circuits. To use the HOLD function, set the HOLD function
Enable Bit of CPU mode register B (address 000116) to “1”. This
function can be used with both the HOLD pin and the HLDA pin.
The HOLD signal is a signal from an external circuit requesting the
MCU to relinquish use of the bus. When “L” level is input, the MCU
goes to the HOLD state and remains so while the pin is at “L”. The
oscillator does not stop oscillating during the HOLD state, there-
fore allowing the internal peripheral functions to operate during
this time.
When the MCU relinquishes use of the bus, “L” level is output from
the HLDA pin. The MCU makes ports P0 and P1 (address buses)
and port P2 (data bus) tri-state outputs and holds port P37 (RD
pin) and port P36 (WR pin) “H” level. Port P34 (
φ OUT pin) contin-
ues to oscillate. This function is not valid when the MCU is using
the IBF1 function with the HLDA pin.
Expanded Data Memory Access
In Expanded Data Memory Access Mode, the MCU can access a
data area larger than 64 Kbytes with the LDA ($zz), Y (indirect Y)
instruction and the STA ($zz), Y (indirect Y) instruction.
To use this mode, set the Expanded Data Memory Access Bit of
CPU mode register B (address 000116) to “1”. In this case, port
P40 (EDMA pin) goes “L” level during the read/write cycle of the
LDA or STA instruction.
The determination of which bank to access is done by using an I/
O port to represent expanded addresses exceeding address bus
AB15. For example, when accessing 4 banks, use two I/O ports to
represent address buses AB16 and AB17.
Fig. 67 Hold function timing diagram
XIN
RD, WR
ADDROUT
DATAIN/OUT
HOLD
HLDA
φ OUT
tsu(HOLD-
φ)
th(
φ-HOLD)
td(
φ-HLDAL)
td(
φ-HLDAH)
Note: This diagram assumes
φ = XIN/2.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34506M2 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34506M2-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34506M4 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34506M4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34507E4FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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