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參數(shù)資料
| 型號(hào)： | M34506E4FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, MICROCONTROLLER, PDSO20 |
| 封裝： | 5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20 |
| 文件頁(yè)數(shù)： | 45/114頁(yè) |
| 文件大小： | 937K |
| 代理商： | M34506E4FP |
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Rev.2.00
Aug 28, 2006
page 32 of 119
7643 Group
REJ03B0054-0200
UTXD output (P84/UTXD)
D0
D1
SP
ST
D2
D3
D4
D5
D6
D7
P
SP
Transfer clock
Tranmit enable bit
Transmit buffer
empty flag
Transmit complete flag
D0
D1
D2
D3
D4
D5
D6
D7
ST
P
D0
D1
ST
Data set into UART transmit buffer register 1
Data transferring from UART transmit
buffer register 1 to Transmit shift register 1
This timing applies to the conditions:
Character length = 8 bits
Parity enabled
1 stop bit
q RTS (Request-to-Send) Function
As a receiver, the UART can be configured to generate the Re-
_______
quest-to-Send (RTS) handshaking signal. This is enabled by
setting the RTS Function Enable Bit (bit 6 of UCON) to “1”.
When reception is enabled, that is the Receive Enable Bit is “1”,
the RTS pin goes “L” to inform a transmitter that reception is pos-
_______
sible. The RTS pin goes “H” at reception starting and does “L” at
receiving of the last bit.
The delay time from the reception of the last stop bit to the asser-
_______
tion of RTS is selectable using the RTS Assertion Delay Count
Select Bits.
BRG count source
D0
URXD (P85/URXD)
ST
SP
D1
D7
RTS pin (P87/RTS)
Receive enable bit
Receive buffer
empty flag
Transfer clock
Transfer clock generated at falling edge
of start bit and receive started
Receive data latched
Data transferring from UART receive register 1
to Receive buffer register 1 (Note)
Note: When no RTS assertion delay, the RTS pin goes “L”.
The RTS assertion delay counts are selected by bits 4 to 7 of UART RTS control register.
This timing applies to the conditions:
Character length = 8 bits
Parity enabled
1 stop bit
_______
Fig. 26 UART transmit timing (CTS function disbled)
When the Receive Enable Bit is set to “0” or the Receive initializa-
_______
tion bit is set to “1”, the RTS pin goes “H”. Even when the Receive
_______
Enable Bit is set to “1”, the RTS pin goes “H” if detecting an invalid
start bit.
Figure 27 shows the UART receive timing.
_______
Fig. 27 UART receiving timing (RTS function enabled)
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| M34508G4H-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO20 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34506M2 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34506M2-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34506M4 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34506M4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34507E4FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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