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參數(shù)資料
| 型號： | M34506E4FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, MICROCONTROLLER, PDSO20 |
| 封裝： | 5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20 |
| 文件頁數(shù)： | 65/114頁 |
| 文件大小： | 937K |
| 代理商： | M34506E4FP |
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Rev.2.00
Aug 28, 2006
page 51 of 119
7643 Group
REJ03B0054-0200
[USB Endpoint x (x = 1, 2) IN Control Register] IN_CSR
This register contains the control and status information of the re-
spective IN Endpoints 1, 2.
Set the IN_PKT_RDY bit to “1” after the data packet has been
written to the IN FIFO. This bit is cleared to “0” when the data
transfer is completed. In a bulk IN transfer, this bit is cleared when
an ACK signal is received from the host. If an ACK signal is not re-
ceived, this bit (and the TX_NOT_EMPTY bit) remains as “1”. This
same data packet is sent after the next IN token is received. The
FLUSH bit is for flushing the data in the IN FIFO.
Fig. 44 Structure of USB endpoint x (x = 1, 2) IN control register
USB endpoint x IN control register (address 005916)
IN_CSR
INT_PKT_RDY bit (INXCSR0)
0: End of a data packet transmission (Note 1)
1: Write “1” at completion of writing a data packet into IN FIFO. (Note 3)
Reserved bit (“0” at read/write)
SEND_STALL bit (INXCSR2) (Note 2)
0: Except the following condition
1: Transmitting STALL handshake signal
TOGGLE_INIT bit (INXCSR3) (Note 2)
0: Except the following condition
1: Initializing the data toggle sequence bit
INTPT bit (INXCSR4) (Note 2)
0: Except the following condition
1: Initializing to endpoint used for interrupt transfer, rate feedback
TX_NOT_EPT flag (INXCSR5) (Note 1)
0: Empty in IN FIFO
1: Full in IN FIFO
FLUSH bit (INXCSR6)
0: Except the following condition (Note 4)
1: Flush FIFO. (Note 4)
AUTO_SET bit (INXCSR7) (Note 2)
0: AUTO_SET disabled
1: AUTO_SET enabled (Note 5)
b0
b7
Notes 1: This bit is automatically set to “1” or cleared to “0”.
2: The user must program to “1” or “0”.
3: When AUTO_SET bit is “0”, the user must set to “1”.
When AUTO_SET bit is “1”, this bit is automatically set to “1”.
4: This bit is automatically cleared to “0” after setting “1”.
5: To use the AUTO_SET function for an IN transfer when the AUTO_SET bit is set to
“1”, set the FIFO to single buffer mode.
0
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相關(guān)代理商/技術(shù)參數(shù) |
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| M34506M2 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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| M34506M4 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34506M4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34507E4FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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