參數(shù)資料
型號： M34502M4-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDSO24
封裝： 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù)： 45/96頁
文件大?。?/td> 958K
代理商： M34502M4-XXXFP
4502 Group
Rev.3.01
2005.02.02
page 3 of 112
REJ03B0105-0301
PERFORMANCE OVERVIEW
Function
113
0.68
s (at 4.4 MHz oscillation frequency, in high-speed mode)
2048 words 10 bits
4096 words 10 bits
128 words 4 bits
256 words 4 bits
Six independent I/O ports.
Input is examined by skip decision.
Ports D2 and D3 are equipped with a pull-up function and a key-on wakeup function. Both func-
tions can be switched by software.
Ports D2 and D3 are also used as ports C and K, respectively.
4-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
4-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
Ports P12 and P13 are also used as CNTR and INT, respectively.
2-bit I/O port; each pin is equipped with a pull-up function and a key-on wakeup function. Both
functions can be switched by software.
Ports P20 and P21 are also used as AIN0 and AIN1, respectively.
2-bit I/O port; Ports P30 and P31 are also used as AIN2 and AIN3, respectively.
1-bit I/O; Port C is also used as port D2.
1-bit I/O; Port K is also used as port D3.
1-bit I/O; CNTR pin is also used as port P12.
1-bit input; INT pin is also used as port P13.
Four independent I/O ports. AIN0–AIN3 is also used as ports P20, P21, P30, P31, respectively.
8-bit programmable timer with a reload register.
8-bit programmable timer with a reload register and has a event counter.
10-bit wide, This is equipped with an 8-bit comparator function.
4 channel (AIN0 pin–AIN3 pin)
4 (one for external, two for timer, one for A/D)
1 level
8 levels
CMOS silicon gate
24-pin plastic molded SSOP (PRSP0024GA-A)
–20 °C to 85 °C
2.7 to 5.5 V (System is in the reset state when the voltage is under the detection voltage of
voltage drop detection circuit)
1.7 mA (Ta=25°C, VDD = 5.0 V, 4.0 MHz oscillation frequency, in high-speed mode, output tran-
sistors in the cut-off state)
0.1
A (Ta=25°C, VDD = 5 V, output transistors in the cut-off state)
Parameter
Number of basic instructions
Minimum instruction execution time
Memory sizes
Input/Output
ports
ROM
RAM
D0–D5
P00–P03
P10–P13
P20, P21
P30, P31
C
K
CNTR
INT
AIN0, AIN1
AIN2, AIN3
Timer 1
Timer 2
Analog input
Sources
Nesting
Active mode
RAM back-up mode
M34502M2
M34502M4/E4
M34502M2
M34502M4/E4
I/O
Timer I/O
Interrupt input
Analog input
Timers
A/D converter
Interrupt
Subroutine nesting
Device structure
Package
Operating temperature range
Supply voltage
Power
dissipation
(typical value)
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