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參數(shù)資料
| 型號： | M30L0R8000T0ZAQE |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | AB 35C 7#12,28#16 PIN RECP |
| 中文描述： | 256兆位（16Mb的x16插槽，多銀行，多層次，多突發(fā)）1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 16/83頁 |
| 文件大?。?/td> | 1363K |
| 代理商： | M30L0R8000T0ZAQE |
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M30L0R8000T0, M30L0R8000B0
16/83
teed when the Block Erase operation is aborted,
the block must be erased again.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being erased.
Typical Erase times are given in
Table
17., Program/Erase Times and Endurance Cy-
cles
.
See
APPENDIX C.
,
Figure 23., Block Erase Flow-
chart and Pseudo Code
, for a suggested flowchart
for using the Block Erase command.
Program Command
The program command is used to program a sin-
gle Word to the memory array.
If the block is protected, the program operation will
abort, the data in the block will not be changed and
the Status Register will output the error.
Two Bus Write cycles are required to issue the
Program Command.
The first bus cycle sets up the Program
command.
The second latches the address and data to
be programmed and starts the Program/Erase
Controller.
Once the programming has started, read opera-
tions in the bank being programmed output the
Status Register content.
During a Program operation, the bank containing
the Word being programmed will only accept the
Read Array, Read Status Register, Read Electron-
ic Signature, Read CFI Query and the Program/
Erase Suspend command, all other commands
will be ignored. A Read Array command is re-
quired to return the bank to Read Array mode.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being programmed.
Typical Program times are given in
Table
17., Program/Erase Times and Endurance Cy-
cles
.
The Program operation aborts if Reset, RP, goes
to V
IL
. As data integrity cannot be guaranteed
when the Program operation is aborted, the Word
must be reprogrammed.
See
APPENDIX C.
,
Figure 20., Program Flow-
chart and Pseudo Code
, for the flowchart for using
the Program command.
■
■
Buffer Program Command
The Buffer Program Command makes use of the
device’s 32-Word Write Buffer to speed up pro-
gramming. Up to 32 Words can be loaded into the
Write Buffer. The Buffer Program command dra-
matically reduces in-system programming time
compared to the standard non-buffered Program
command.
If the block is protected, the Buffer Program oper-
ation will abort, the data in the block will not be
changed and the Status Register will output the er-
ror.
Four successive steps are required to issue the
Buffer Program command.
1.
The first Bus Write cycle sets up the Buffer
Program command. The setup code can be
addressed to any location within the targeted
block.
After the first Bus Write cycle, read operations in
the bank will output the contents of the Status
Register. Status Register bit SR7 should be read
to check that the buffer is available (SR7 = 1). If
the buffer is not available (SR7 = 0), re-issue the
Buffer Program command to update the Status
Register contents.
2.
The second Bus Write cycle sets up the
number of Words to be programmed. Value n
is written to the same block address, where
n+1 is the number of Words to be
programmed.
3.
Use n+1 Bus Write cycles to load the address
and data for each Word into the Write Buffer.
Addresses must lie within the range from the
start address to the start address + n.
Optimum performance is obtained when the
start address corresponds to a 32 Word
boundary. If the start address is not aligned to
a 32 word boundary, the total programming
time is doubled
4.
The final Bus Write cycle confirms the Buffer
Program command and starts the program
operation.
All the addresses used in the Buffer Program op-
eration must lie within the same block.
Invalid address combinations or failing to follow
the correct sequence of Bus Write cycles will set
an error in the Status Register and abort the oper-
ation without affecting the data in the memory ar-
ray.
If the Status Register bits SR4 and SR5 are set to
'1', the Buffer Program Command is not accepted.
Clear the Status Register before re-issuing the
command.
During Buffer Program operations the bank being
programmed will only accept the Read Array,
Read Status Register, Read Electronic Signature,
Read CFI Query and the Program/Erase Suspend
command, all other commands will be ignored.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being programmed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30L0R8000B0ZAQE | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQF | CAP 0.1UF 50V 10% X7R DIP-2 BULK S-MIL-C-39014 |
| M30L0R8000B0ZAQT | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQ | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0 | 256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30L0R8000T0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L40C | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Dual Common-Cathode Schottky Rectifier |
| M30L40C-E3/4W | 功能描述:肖特基二極管與整流器 40 Volt 30 Amp Dual Common-Cathode RoHS:否 制造商:Skyworks Solutions, Inc. 產(chǎn)品:Schottky Diodes 峰值反向電壓:2 V 正向連續(xù)電流:50 mA 最大浪涌電流: 配置:Crossover Quad 恢復(fù)時(shí)間: 正向電壓下降:370 mV 最大反向漏泄電流: 最大功率耗散:75 mW 工作溫度范圍:- 65 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-143 封裝:Reel |
| M30L45C-E3/4W | 功能描述:肖特基二極管與整流器 45 Volt 30 Amp Dual Common-Cathode RoHS:否 制造商:Skyworks Solutions, Inc. 產(chǎn)品:Schottky Diodes 峰值反向電壓:2 V 正向連續(xù)電流:50 mA 最大浪涌電流: 配置:Crossover Quad 恢復(fù)時(shí)間: 正向電壓下降:370 mV 最大反向漏泄電流: 最大功率耗散:75 mW 工作溫度范圍:- 65 C to + 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-143 封裝:Reel |
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