參數(shù)資料
型號(hào)： M25PX32-VMW6E
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門，串行閃存
文件頁(yè)數(shù)： 41/63頁(yè)
文件大小： 394K
代理商： M25PX32-VMW6E
M25PX32
Instructions
41/63
6.13
Program OTP instruction (POTP)
The Program OTP instruction (POTP) is used to program at most 64 bytes to the OTP
memory area (by changing bits from 1 to 0, only). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been executed. After the Write Enable (WREN)
instruction has been decoded, the device sets the Write Enable Latch (WEL) bit.
The Program OTP instruction is entered by driving Chip Select (S) Low, followed by the
instruction opcode, three address bytes and at least one data byte on Serial Data input
(DQ0).
Chip Select (S) must be driven High after the eighth bit of the last data byte has been
latched in, otherwise the Program OTP instruction is not executed.
There is no rollover mechanism with the Program OTP (POTP) instruction. This means that
the Program OTP (POTP) instruction must be sent with a maximum of 65 bytes to program,
once all 65 bytes have been latched in, any following byte will be discarded.
The instruction sequence is shown in
Figure 20
.
As soon as Chip Select (S) is driven High, the self-timed Page Program cycle (whose
duration is t
PP
) is initiated. While the Program OTP cycle is in progress, the Status Register
may be read to check the value of the Write In Progress (WIP) bit. The Write In Progress
(WIP) bit is 1 during the self-timed Program OTP cycle, and it is 0 when it is completed. At
some unspecified time before the cycle is complete, the Write Enable Latch (WEL) bit is
reset.
To lock the OTP memory:
Bit 0 of the OTP control byte, that is byte 64, (see
Figure 21
) is used to permanently lock the
OTP memory array.
When bit 0 of byte 64 = ’1’, the 64 bytes of the OTP memory array can be programmed.
When bit 0 of byte 64 = ‘0’, the 64 bytes of the OTP memory array are read-only and
cannot be programmed anymore.
●
●
Once a bit of the OTP memory has been programmed to ‘0’, it can no longer be set to ‘1’.
Therefore, as soon as bit 0 of byte 64 (control byte) is set to ‘0’, the 64 bytes of the OTP
memory array become read-only in a permanent way.
Any Program OTP (POTP) instruction issued while an Erase, Program or Write cycle is in
progress is rejected without having any effect on the cycle that is in progress.
相關(guān)PDF資料
PDF描述
M25PX32-VMW6F 4 Mbit Uniform Sector, Serial Flash Memory
M25PX32-VMF6E 4 Mbit Uniform Sector, Serial Flash Memory
M25PX32-VMF6F 4 Mbit Uniform Sector, Serial Flash Memory
M27128A NMOS 128K 16K x 8 UV EPROM
M27128A-20F1 NMOS 128K 16K x 8 UV EPROM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25PX32-VMW6EBA 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Trays
M25PX32-VMW6F 功能描述:IC FLASH 32MBIT 75MHZ 8SOIC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:Forté™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
M25PX32-VMW6FBA 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Tape and Reel
M25PX32-VMW6Y 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays
M25PX32-VZM6E 制造商:Micron Technology Inc 功能描述:SERIAL NOR - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 32MBIT 75MHZ 24TBGA
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