參數(shù)資料
型號(hào): LXT388LE
英文描述: PCM TRANSCEIVER|DUAL|CEPT PCM-30/E-1|CMOS|QFP|100PIN|PLASTIC
中文描述: 的PCM收發(fā)器|雙|優(yōu)稅PCM-30/E-1 |的CMOS | QFP封裝| 100引腳|塑料
文件頁(yè)數(shù): 57/80頁(yè)
文件大?。?/td> 1112K
代理商: LXT388LE
Octal T1/E1/J1 Transceiver
LXT384
Datasheet
57
Transmit intrinsic jitter; 20Hz to 100kHz
0.030
0.050
U.I.
Tx path TCLK is jitter
free
Transmit path
delay
Bipolar mode
2
U.I.
JA Disabled
Unipolar mode
7
U.I.
Table 39. E1 Receive Transmission Characteristics
Parameter
Sym
Min.
Typ
Max
Unit
Test Condition
Permissible cable attenuation
12
dB
@1024 kHz
Receiver dynamic range
DR
0.5
Vp
Signal to noise interference margin
S/I
-15
dB
Per G.703, O.151 @ 6
dB cable Attenuation
Data decision threshold
SRE
43
50
57
%
Rel. to peak input
voltage
Data slicer threshold
150
mV
Loss of signal threshold
200
mV
LOS hysteresis
50
mV
Consecutive zeros before loss of signal
32
2048
G.775
recommendation
ETSI 300 233
specification
LOS reset
12.5%
1
s density
Low limit
input jitter
tolerance
1
1Hz to 20Hz
20Hz to 2.4kHz
18kHz to 100kHz
36
1.5
0.2
U.I.
U.I.
U.I.
G735
recommendation
Note 1
Cable Attenuation is 6
dB
Differential receiver input impedance
70
k
@1.024 MHz
Input termination resistor tolerance
±1
%
Common mode input impedance to ground
20
k
Input return
loss
51 kHz - 102 kHz
102 - 2048 kHz
2048kHz - 3072 kHz
20
20
20
dB
dB
dB
Measured against
nominal impedance
using components in
the LXD384
evaluation board.
LOS delay time
30
μs
Data recovery mode
LOS reset
10
255
marks
Data recovery mode
Receive intrinsic jitter, RCLK output
0.040
0.0625
U.I.
Wide band jitter
Receive
path delay
Bipolar mode
1
U.I.
JA Disabled
Unipolar mode
6
U.I.
1. Guaranteed by design and other correlation methods.
Table 38. E1 Transmit Transmission Characteristics (Sheet 2 of 2)
Parameter
Sym
Min.
Typ
Max
Unit
Test Condition
1. Guaranteed by design and other correlation methods.
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