參數(shù)資料
型號(hào): LXT384LE
元件分類: 通信、網(wǎng)絡(luò)模塊及開發(fā)工具
英文描述: Telecomm/Datacomm
中文描述: 電信/數(shù)據(jù)通信
文件頁數(shù): 52/80頁
文件大?。?/td> 1112K
代理商: LXT384LE
LXT384
Octal T1/E1/J1 Transceiver
52
Datasheet
4.4.2
Analog Port Scan Register (ASR)
The ASR is a 5 bit shift register used to control the analog test port at pins AT1, AT2. When the
INTEST_ANALOG instruction is selected, TDI connects to the ASR input and TDO connects to
the ASR output. After 5 TCK rising edges, a 5 bit control code is loaded into the ASR. Data into
the ASR is shifted in LSB first.
Table 32
shows the 16 possible control codes and the corresponding operation on the analog port.
89
TNEG6
I
TNEG6
90
TPOS6
I
TPOS6
91
TCLK6
I
TCLK6
92
MCLK
I
MCLK
93
MODE
I
MODE
94
A4
I
A4
95
A3
I
A3
96
A2
I
A2
97
A1
I
A1
98
A0
I
A0
Table 31. Boundary Scan Register (BSR) (Sheet 4 of 4)
Bit #
Pin
Signal
I/O Type
Bit
Symbol
Comments
Table 32. Analog Port Scan Register (ASR)
ASR Control Code
AT1 Forces Voltage To:
AT2 Senses Voltage From:
11111
TTIP0
TRING0
11110
TTIP1
TRING1
11101
TTIP2
TRING2
11100
TTIP3
TRING3
11011
TTIP4
TRING4
11010
TTIP5
TRING5
11001
TTIP6
TRING6
11000
TTIP7
TRING7
10111
RTIP0
RRING0
10110
RTIP1
RRING1
10101
RTIP2
RRING2
10100
RTIP3
RRING3
10011
RTIP4
RRING4
10010
RTIP5
RRING5
10001
RTIP6
RRING6
10000
RTIP7
RRING7
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