參數(shù)資料
型號： LXT384LE
元件分類： 通信、網(wǎng)絡(luò)模塊及開發(fā)工具
英文描述： Telecomm/Datacomm
中文描述： 電信/數(shù)據(jù)通信
文件頁數(shù)： 31/80頁
文件大小： 1112K
代理商： LXT384LE
Octal T1/E1/J1 Transceiver
—
LXT384
Datasheet
31
2.7
Loopbacks
The LXT384 offers three loopback modes for diagnostic purposes. In hardware mode, the loopback
mode is selected with the LOOPn pins. In software mode, the ALOOP, DLOOP and RLOOP
registers are employed.
2.7.1
Analog Loopback
When selected, the transmitter outputs (TTIP & TRING) are connected internally to the receiver
inputs (RTIP & RRING) as shown in
Figure 8
. Data and clock are output at RCLK, RPOS &
RNEG pins for the corresponding transceiver. Note: signals on the RTIP & RRING pins are
ignored during analog loopback.
Figure 7. Jitter Attenuator Loop
FIFO
DPLL
IN CK
OUT CK
TPOS
RPOSi
TNEG
RNEGi
TCLK
RCLKi
JASEL0-1
TPOSo
RPOS
TNEGo
RNEG
TCLK
RCLK
JASEL0-1
FIFO64
JACF
MCLK
GCR control bits
x 32
IN
OUT
Figure 8. Analog Loopback
Timing &
Control
Timing
Recovery
TTIP
TRING
RTIP
RRING
H
E
RCLK
RPOS
RNEG
TCLK
TPOS
TNEG
H
D
* If Enabled
JA*
JA*
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