參數(shù)資料
型號: LV8572AVX
英文描述: Real-Time Clock
中文描述: 實時時鐘
文件頁數(shù): 6/24頁
文件大?。?/td> 353K
代理商: LV8572AVX
Functional Description
The LV8571A contains a fast access real time clock, two 10
MHz 16-bit timers, interrupt control logic, power fail detect
logic, and CMOS RAM. All functions of the TCP are con-
trolled by a set of nine registers. A simplified block diagram
that shows the major functional blocks is given in Figure 1.
The blocks are described in the following sections:
1. Real Time Clock
2. Oscillator Prescaler
3. Interrupt Logic
4. Power Failure Logic
5. Additional Supply Management
6. Timers
The memory map of the TCP is shown in the memory ad-
dressing table. The memory map consists of two 31 byte
pages with a main status register that is common to both
pages. A control bit in the Main Status Register is used to
select either page. Figure 2 shows the basic concept.
Page 0 contains all the clock timer functions, while page 1
has scratch pad RAM. The control registers are split into
two separate blocks to allow page 1 to be used entirely as
scratch pad RAM. Again a control bit in the Main Status
Register is used to select either control register block.
TL/F/11416–6
FIGURE 2. LV8571A Internal Memory Map
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