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參數(shù)資料
| 型號(hào)： | LV8572AVX |
| 英文描述： | Real-Time Clock |
| 中文描述： | 實(shí)時(shí)時(shí)鐘 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大小： | 353K |
| 代理商： | LV8572AVX |
Functional Description
(Continued)
INPUT CLOCK SELECTION
The input frequency to the timers may be selected. Each
timer has a prescaler that gives a wide selection of clocking
rates. Table IV shows the range of programmable clocks
available and the corresponding setting in the Timer Control
Register. Note that the output of Timer 1 may be used as
the input to Timer 0. This is a cascade option for the timers
and allows them to be clocked as a 32-bit down counter.
TABLE IV. Programmable Timer Input Clocks
C2
C1
C0
Selected Clock
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Timer 1 Output
Crystal Oscillator
(Crystal Oscillator)/4
93.5
m
s (10.7 kHz)
1 ms (1 kHz)
10 ms (100 Hz)
1/10 Second (10 Hz)
1 Second (1 Hz)
Note that the second and third selections are not fixed fre-
quencies, but depend on the crystal oscillator frequency
chosen.
Since the input clock frequencies are usually running asyn-
chronously to the timer Start/Stop control bit, a 1 clock cy-
cle error may result. This error results when the Start/Stop
occurs just after the clock edge (max error). To minimize
this error on all clocks an independent prescaler is used for
each timer and is designed so that its Start/Stop error is
less than 1 clock cycle.
The count hold/gate bit in the Timer Control Register can
be used to suspend the timer operation in modes 0, 1, and 2
(in mode 3 it is the trigger input). Suspending the tim-
er causes the same synchronization error that starting the
timer does. The range of errors is specified in Table V.
TABLE V. Maximum Synchronization Errors
Clock Selected
Error
External
Crystal
Crystal/4
10.7 kHz
1 kHz
100 Hz
10 Hz
1 Hz
a
Ext. Clock Period
a
1 Crystal Clock Period
a
1 Crystal Clock Period
a
32
m
s
a
32
m
s
a
32
m
s
a
32
m
s
a
32
m
s
MODES OF OPERATION
Bits M0 and M1 in the Timer Control Registers are used to
specify the modes of operation. The mode selection is de-
scribed in Table VI.
TABLE VI. Programmable Timer Modes of Operation
M1
M0
Function
Modes
0
0
1
1
0
1
0
1
Single Pulse Generator
Rate Generator, Pulse Output
Square Wave Output
Retriggerable One Shot
Mode 0
Mode 1
Mode 2
Mode 3
MODE 0: SINGLE PULSE GENERATOR
When the timer is in this mode the output will be initially low
if the Timer Start/Stop bit is low (stopped). When this mode
is initiated the timer output will go high on the next falling
edge of the prescaler’s input clock, the contents of the
TL/F/11416–11
FIGURE 7. LV8571A Timer Block Diagram
13
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