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參數(shù)資料
| 型號： | LU3X54FT |
| 英文描述： | QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
| 中文描述： | 四場效應(yīng)管（快速以太網(wǎng)收發(fā)器）的10Base-T/100Base-TX/FX |
| 文件頁數(shù)： | 23/54頁 |
| 文件大小： | 677K |
| 代理商： | LU3X54FT |
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Lucent Technologies Inc.
23
Data Sheet
July 2000
LU3X54FT
QUAD-FET for 10Base-T/100Base-TX/FX
Pin Information
(continued)
Pin Descriptions
(continued)
Table 7. Miscellaneous Pins
Pin
81
Signal
CKREF
Type
I
Description
Clock Reference.
Connect this pin to a 1 nF
±
10% capacitor to
ground.
Reserved.
For normal operation, leave these pins unconnected.
184
183
197
ATEST[B:A]
O
AUTO_EN
I
Autonegotiation Enable.
When this pin is high, autonegotiation is
enabled. Pulsing this pin will cause autonegotiation to restart. This
input has the same function as register 0, bit 12. This input and the reg-
ister bit are ANDed together.
PWR
Ground.
(38 pins.)
1, 7,
11, 14,
18, 22,
24, 26,
29, 31,
35, 39,
41, 45,
49, 58,
64, 73,
79, 82,
86, 91,
97, 106,
115, 118,
124, 133,
141, 147,
156, 163,
177, 178,
181, 182,
186, 208
4, 8, 12,
15, 19,
23, 28,
30, 34,
38, 40,
44, 48,
52, 61,
69, 77,
80, 83,
94, 102,
111, 121,
129, 137,
144, 152,
160, 167,
172, 179,
180, 185,
195, 202
196
GND/V
SS
V
DD
PWR
V
DD
.
Single 5.0 V
±
5% power supply. (35 pins.)
3ST_EN
I
3-State Enable.
When this pin is high, all digital outputs will be
3-stated. For normal operating conditions, pull this pin low.
Band Gap Reference.
Connect these pins to a 24.9 k
±
1% resistor
to ground. The parasitic load capacitance should be less than 15 pF.
Current Set 10 Mbits/s.
An external resistor (22.1 k
) is placed from
this pin to ground to set the 10 Mbits/s TP driver transmit output level.
25
13
42
BGREF[1:0]
I
ISET_10
I
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| LU3X54FTL | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
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| LU3X54FTL-HS208-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX |
| LU3X54FTLHS208-DB | 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208-DB |
| LU400 | 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:NEMA Cabinet Legs |
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