參數(shù)資料
型號(hào): LPC2930FBD208
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 flashless microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, MROM, 125 MHz, RISC MICROCONTROLLER, PQFP208
封裝: 28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT459-1, LQFP-208
文件頁數(shù): 55/98頁
文件大?。?/td> 643K
代理商: LPC2930FBD208
LPC2930_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 16 April 2010
55 of 98
NXP Semiconductors
LPC2930
ARM9 microcontroller with CAN, LIN, and USB
Automatic reset stretching and release
Monitor function to trace resets back to source
Register write-protection mechanism to prevent unintentional resets
6.14.4.1
Functional description
Each reset output is defined as a combination of reset input sources including the external
reset input pins and internal power-on reset, see
Table 29
. The first five resets listed in
this table form a sort of cascade to provide the multiple levels of impact that a reset may
have. The combined input sources are logically OR-ed together so that activating any of
the listed reset sources causes the output to go active.
Table 29.
Reset output
POR_RST
RGU_RST
PCR_RST
COLD_RST
WARM_RST
SCU_RST
CFID_RST
EMC_RST
SMC_RST
6.14.4.2
Pin description
The RGU module in the LPC2930 has the following pins.
Table 30
shows the RGU pins.
Reset output configuration
Reset source
power-on reset module
POR_RST, RST pin
RGU_RST, WATCHDOG
PCR_RST
COLD_RST
COLD_RST
COLD_RST
COLD_RST
COLD_RST
Parts of the device reset when activated
LP_OSC; source for RGU_RST
RGU internal; source for PCR_RST
PCR internal; source for COLD_RST
parts with COLD_RST as reset source below
parts with WARM_RST as reset source below
SCU
CFID
embedded SRAM-Memory Controller
external Static-Memory Controller (SMC)
GESS_A2V_RST
PESS_A2V_RST
GPIO_RST
UART_RST
TMR_RST
SPI_RST
IVNSS_A2V_RST
IVNSS_CAN_RST
IVNSS_LIN_RST
MSCSS_A2V_RST
MSCSS_PWM_RST
MSCSS_ADC_RST
MSCSS_TMR_RST
I2C_RST
QEI_RST
DMA_RST
USB_RST
VIC_RST
AHB_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
WARM_RST
GeSS AHB-to-APB bridge
PeSS AHB-to-APB bridge
all GPIO modules
all UART modules
all Timer modules in PeSS
all SPI modules
IVNSS AHB-to-APB bridge
all CAN modules including Acceptance filter
all LIN modules
MSCSS AHB to APB bridge
all PWM modules
all ADC modules
all Timer modules in MSCSS
all I
2
C modules
Quadrature encoder
GPDMA controller
USB controller
Vectored Interrupt Controller (VIC)
CPU and AHB Bus infrastructure
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