參數(shù)資料
型號: LPC2930FBD208
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 flashless microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, MROM, 125 MHz, RISC MICROCONTROLLER, PQFP208
封裝: 28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT459-1, LQFP-208
文件頁數(shù): 36/98頁
文件大小: 643K
代理商: LPC2930FBD208
LPC2930_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 16 April 2010
36 of 98
NXP Semiconductors
LPC2930
ARM9 microcontroller with CAN, LIN, and USB
Listen-only mode (no acknowledge; no active error flags).
Reception of ‘own’ messages (self-reception request).
FullCAN mode for message reception.
6.12.1.1
Global acceptance filter
The global acceptance filter provides look-up of received identifiers - called acceptance
filtering in CAN terminology - for all the CAN controllers. It includes a CAN ID look-up table
memory, in which software maintains one to five sections of identifiers. The CAN ID
look-up table memory is 2 kB large (512 words, each of 32 bits). It can contain up to 1024
standard frame identifiers or 512 extended frame identifiers or a mixture of both types. It is
also possible to define identifier groups for standard and extended message formats.
6.12.1.2
Pin description
The two CAN controllers in the LPC2930 have the pins listed below. The CAN pins are
combined with other functions on the port pins of the LPC2930.
Table 19
shows the CAN
pins (x runs from 0 to 1).
Table 19.
Symbol
CANx TXD
CANx RXD
6.12.2
LIN
The LPC2930 contain two LIN 2.0 master controllers. These can be used as dedicated
LIN 2.0 master controllers with additional support for sync break generation and with
hardware implementation of the LIN protocol according to spec 2.0.
Remark:
Both LIN channels can be also configured as UART channels.
The key features are:
Complete LIN 2.0 message handling and transfer
One interrupt per LIN message
Slave response time-out detection
Programmable sync-break length
Automatic sync-field and sync-break generation
Programmable inter-byte space
Hardware or software parity generation
Automatic checksum generation
Fault confinement
Fractional baud rate generator
6.12.2.1
Pin description
The two LIN 2.0 master controllers in the LPC2930 have the pins listed below. The LIN
pins are combined with other functions on the port pins of the LPC2930.
Table 20
shows
the LIN pins. For more information see
Ref. 1
subsection 3.43, LIN master controller.
CAN pins
Pin name
TXDC0/1
RXDC0/1
Direction
OUT
IN
Description
CAN channel x transmit data output
CAN channel x receive data input
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