參數(shù)資料
型號(hào): LPC2930FBD208
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 flashless microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, MROM, 125 MHz, RISC MICROCONTROLLER, PQFP208
封裝: 28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT459-1, LQFP-208
文件頁數(shù): 33/98頁
文件大?。?/td> 643K
代理商: LPC2930FBD208
LPC2930_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 16 April 2010
33 of 98
NXP Semiconductors
LPC2930
ARM9 microcontroller with CAN, LIN, and USB
6.11.4.2
Clock description
The UART modules are clocked by two different clocks; CLK_SYS_PESS and
CLK_UARTx (x = 0 to 1), see
Section 6.6.2
. Note that each UART has its own
CLK_UARTx branch clock for power management. The frequency of all CLK_UARTx
clocks is identical since they are derived from the same base clock BASE_CLK_UART.
The register interface towards the system bus is clocked by CLK_SYS_PESS. The baud
generator is clocked by the CLK_UARTx.
6.11.5
Serial peripheral interface (SPI)
The LPC2930 contains three Serial Peripheral Interface modules (SPIs) to allow
synchronous serial communication with slave or master peripherals.
The key features are:
Master or slave operation.
Each SPI supports up to four slaves in sequential multi-slave operation.
Supports timer-triggered operation.
Programmable clock bit rate and prescale based on SPI source clock
(BASE_SPI_CLK), independent of system clock.
Separate transmit and receive FIFO memory buffers; 16 bits wide, 32 locations deep.
Programmable choice of interface operation: Motorola SPI or Texas Instruments
Synchronous Serial Interfaces.
Programmable data-frame size from 4 to 16 bits.
Independent masking of transmit FIFO, receive FIFO and receive overrun interrupts.
Serial clock-rate master mode: fserial_clk
f
clk(SPI)
/2.
Serial clock-rate slave mode: fserial_clk = f
clk(SPI)
/4.
Internal loopback test mode.
The SPI module can operate in:
Master mode:
Normal transmission mode
Sequential slave mode
Slave mode
6.11.5.1
Functional description
The SPI module is a master or slave interface for synchronous serial communication with
peripheral devices that have either Motorola SPI or Texas Instruments Synchronous
Serial Interfaces.
The SPI module performs serial-to-parallel conversion on data received from a peripheral
device. The transmit and receive paths are buffered with FIFO memories (16 bits wide
×
32 words deep). Serial data is transmitted on pins SDOx and received on pins SDIx.
The SPI module includes a programmable bit-rate clock divider and prescaler to generate
the SPI serial clock from the input clock CLK_SPIx.
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