參數(shù)資料
型號(hào): LPC2930FBD208
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 flashless microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, MROM, 125 MHz, RISC MICROCONTROLLER, PQFP208
封裝: 28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT459-1, LQFP-208
文件頁(yè)數(shù): 29/98頁(yè)
文件大小: 643K
代理商: LPC2930FBD208
LPC2930_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 16 April 2010
29 of 98
NXP Semiconductors
LPC2930
ARM9 microcontroller with CAN, LIN, and USB
Programmable input level and edge polarity.
Event detection maskable.
Event detection is fully asynchronous, so no clock is required.
The event router allows the event source to be defined, its polarity and activation type to
be selected and the interrupt to be masked or enabled. The event router can be used to
start a clock on an external event.
The vectored interrupt-controller inputs are active HIGH.
6.10.4.1
Pin description
The event router module in the LPC2930 is connected to the pins listed below. The pins
are combined with other functions on the port pins of the LPC2930.
Table 14
shows the
pins connected to the event router.
Table 14.
Symbol
EXTINT[7:0]
CAN0 RXD
CAN1 RXD
I
2
C0 SCL
I
2
C1 SCL
LIN0 RXD
LIN1 RXD
SPI0 SDI
SPI1 SDI
SPI2 SDI
UART0 RXD
UART1 RXD
USB_SCL1
-
-
-
6.11 Peripheral subsystem
6.11.1
Peripheral subsystem clock description
The peripheral subsystem is clocked by a number of different clocks:
CLK_SYS_PESS
CLK_UART0/1
CLK_SPI0/1/2
CLK_TMR0/1/2/3
CLK_SAFE see
Section 6.6.2
Event-router pin connections
Direction
I
I
I
I
I
I
I
I
I
I
I
I
I
na
na
na
Description
external interrupt inputs 7 to 0
CAN0 receive data input wake-up
CAN1 receive data input wake-up
I
2
C0 SCL clock input
I
2
C1 SCL clock input
LIN0 receive data input wake-up
LIN1 receive data input wake-up
SPI0 receive data input
SPI1 receive data input
SPI2 receive data input
UART0 receive data input
UART1 receive data input
USB I
2
C serial clock
CAN interrupt (internal)
VIC FIQ (internal)
VIC IRQ (internal)
Default polarity
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
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