參數(shù)資料
型號(hào): LPC2925FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁(yè)數(shù): 21/84頁(yè)
文件大?。?/td> 551K
代理商: LPC2925FBD100
LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
21 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
The USB device controller has the following features:
Fully compliant with
USB 2.0 specification (full speed)
.
Supports 32 physical (16 logical) endpoints with a 2 kB endpoint buffer RAM.
Supports Control, Bulk, Interrupt and Isochronous endpoints.
Scalable realization of endpoints at run time.
Endpoint Maximum packet size selection (up to USB maximum specification) by
software at run time.
Supports SoftConnect and GoodLink features.
While USB is in the Suspend mode, the LPC2921/2923/2925 can enter the reduced
power mode and wake up on USB activity.
Supports DMA transfers with the on-chip SRAM blocks on all non-control endpoints.
Allows dynamic switching between CPU-controlled slave and DMA modes.
Double buffer implementation for Bulk and Isochronous endpoints.
6.10.2
Pin description
Table 11.
Pin name
USB_VBUS
6.10.3
Clock description
Access to the USB registers is clocked by the CLK_SYS_USB, derived from
BASE_SYS_CLK, see
Section 6.7.2
. The CGU1 provides an independent base clock to
the USB block, BASE_USB_CLK (see
Section 6.15.3
).
USB device port pins
Direction
I
Description
USB_VBUS status input. When this function is not enabled
via its corresponding PINSEL register, it is driven HIGH
internally.
USB_D+
USB_D
USB_CONNECT
USB_UP_LED
I/O
I/O
O
O
positive differential data
negative differential data
SoftConnect control signal
GoodLink LED control signal
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