參數(shù)資料
型號: LAN8700
廠商: SMSC Corporation
英文描述: 【15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR TM in a Small Footprint
中文描述: 【15kV的ESD保護信息產(chǎn)業(yè)部/ RMII快速的HP Auto - MDIX功能和SMSC flexPWR商標以太網(wǎng)PHY在小尺寸
文件頁數(shù): 47/73頁
文件大小: 457K
代理商: LAN8700
±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR
TM
in a Small Footprint
Datasheet
SMSC LAN8700/LAN8700I
47
Revision 1.0 (02-09-07)
DATASHEET
5.3
Interrupt Management
The Management interface supports an interrupt capability that is not a part of the IEEE 802.3
specification. It generates an active low asynchronous interrupt signal on the nINT output whenever
certain events are detected as setup by the Interrupt Mask Register 30.
The Interrupt system on the SMSC LAN8700/8700I has two modes, a Primary Interrupt mode and an
Alternative Interrupt mode. Both systems will assert the nINT pin low when the corresponding mask
bit is set, the difference is how they de-assert the output interrupt signal nINT.
The Primary interrupt mode is the default interrupt mode after a power-up or hard reset, the Alternative
interrupt mode would need to be setup again after a power-up or hard reset.
Table 5.43 Register 30 - Interrupt Mask
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
30.15:8
Reserved
Write as 0; ignore on read.
RO
0
30.7:1
Mask Bits
1 = interrupt source is enabled
0 = interrupt source is masked
RW
0
30.0
Resrved
Write as 0; ignore on read
RO
0
Table 5.44 Register 31 - PHY Special Control/Status
ADDRESS
NAME
DESCRIPTION
MODE
DEFAULT
31.15:13
Reserved
Write as 0, ignore on read.
RW
0
31.12
Autodone
Auto-negotiation done indication:
0 = Auto-negotiation is not done or disabled (or not
active)
1 = Auto-negotiation is done
Note:
This is a duplicate of register 1.5, however
reads to register 31 do not clear status bits.
RO
0
31.11:10
Reserved
Write as 0, ignore on Read.
RW
XX
31.9:7
GPO[2:0]
General Purpose Output connected to signals
GPO[2:0]
RW
0
31.6
Enable 4B5B
0 = Bypass encoder/decoder.
1 = enable 4B5B encoding/decoding.
MAC Interface must be configured in MII mode.
RW
1
31.5
Reserved
Write as 0, ignore on Read.
RW
0
31.4:2
Speed Indication
HCDSPEED value:
[001]=10Mbps Half-duplex
[101]=10Mbps Full-duplex
[010]=100Base-TX Half-duplex
[110]=100Base-TX Full-duplex
RO
XXX
31.1
Reserved
Write as 0; ignore on Read
RW
0
31.0
Scramble Disable
0 = enable data scrambling
1 = disable data scrambling,
RW
0
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