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參數(shù)資料
| 型號： | L6566BTR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Multi-mode controller for SMPS |
| 中文描述： | 多模式開關(guān)電源控制器 |
| 文件頁數(shù)： | 28/51頁 |
| 文件大?。?/td> | 401K |
| 代理商： | L6566BTR |
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Application information
L6566B
28/51
setpoint. This is illustrated in the diagram on the left-hand side of
Figure 17 on page 29
: it
shows the relationship between the voltage on the pin VFF and V
csx
(with the error amplifier
saturated high in the attempt of keeping output voltage regulation):
Equation 5
Figure 16. Typical power capability change vs. input voltage in QR flyback
converters
Note:
If the voltage on the pin exceeds 3V switching ceases but the soft-start capacitor is not
discharged. The schematic in
Figure 17 on page 29
shows also how the function is included
in the control loop.
With a proper selection of the external divider R1-R2, i.e. of the ratio k = R2 / (R1+R2), it is
possible to achieve the optimum compensation described by the lower curve in the diagram
of
Figure 16
.
The optimum value of k, k
opt
, which minimizes the power capability variation over the input
voltage range, is the one that provides equal power capability at the extremes of the range.
The exact calculation is complex, and non-idealities shift the real-world optimum value from
the theoretical one. It is therefore more practical to provide a first cut value, simple to be
calculated, and then to fine tune experimentally.
Assuming that the system operates exactly at the boundary between DCM and CCM, and
neglecting propagation delays, the following expression for k
opt
can be found:
Equation 6
Vin
3
k
1
3
V
1
V
VFF
csx
=
=
V
in
V
inmin
P
i
@
i
1
1.5
2
2.5
3
3.5
4
0.5
1
1.5
2
2.5
system optimally
compensated
system not
compensated
k = 0
k = k
opt
k
(
)
R
max
in
min
in
max
in
min
in
R
opt
V
V
V
V
V
V
3
k
+
+
=
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