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參數(shù)資料
| 型號： | L6256 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 12V COMBO |
| 中文描述： | 12V的組合 |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 258K |
| 代理商： | L6256 |
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tection of the 12V Combo vs. a Dolphin chip
(3) the DAC write bit toggles every time a byte is written to the DAC. This provides confirmation that the write actually took place.
(4) Detects spurious or missing SCLK edge count between CSELB edges.
(5) flips state whenever either ACR or VCR is written to successfully. This bit can be used together with the
TX_ERR
bit to see whether data
was changed in the Dolphin.
(6) If the back EMF chop blanking comparator goes high during the PWM
On_Del
period, this bit is set to a one. See the back EMF section.
(7) bit is reset every time the register is accessed by the processor.
(8) current limit bit works in run mode as well as in start mode. If current limit is ever detected in run mode, the chip should be immediately
tristated.
(9) A1 in this bit indicates the correct (forward) phasing has been detected by the back EMF circuitry. Specifically, at the negative edge of
SP_CLK the back EMF comparator must be in the expected state, or else the bit is cleared. Updated on every negative SP_CLK edge.
SPINDLE CIRCUITRY SPECIFICATIONS
Spindle Circuitry Specifications
Symbol
T
brake
Parameter
Test Conditions
V
emf
= 7V
R
ref
= 62.5K 1%
Startup I
peak
Min.
8
Typ.
Max.
Unit
s (1)
A
Braking Time
Start Mode Current Limit (bipolar)
Start Mode Current Limit
Tolerance
Slew Rate
Vpwr current spiking
1.6
±
7%
of programmed
current (2)
V/
μ
s
above spindle
run current
(4)
A
μ
A
SR
At speed (3)
At run speed
12
15
25%
Slew Rate range adjustment
Run Mode Current Limit
Spindle Output Current Leakage
(6)
Snubber caps
0.5:1
0.7
-100
2:1
1.6
+100
1.0
Tristate
0
0.01
μ
F 20%
(1) braking on the spindle motor must remain active for the full braking time. This parameter is guaranteed by a leakage specification. Full
power brake is 3 seconds maximum.
(2) excluding Vcc tolerances.
(3) Slew rate at startup is limited by the parasitic diode revrse recovery timeso that the peak current spikes in the power supply are no larger
than 25% above the motor run current.
(4) Slew circuitry must internally be able to drive stated snubber loads and be adjusted from 0.5 to 2 times the nominal value. This implies
that Rslew is able to be adjusted from 51K to 200K without causing circuit problems within the chip.
(5) Run mode current limit is strictly a protection mechanism to protect against spurious SP_CLKs or improperly programmed timing. Max
limit is a manifacturer limit determined by safe operating area considerations for the spindle FETs. The minimum limit determines the
maximum chip loading during run time. Since this is strictly an internal limit, tolerances on this value are very wide.
(6) Spindle Output Leakage must not interfere with back EMF sensing at any time.
Feedforward Circuitry Specifications
Symbol
t
off min(1)
Parameter
Test Conditions
Min.
Typ.
20/SR
110
22
-
Max.
Unit
μ
s
Minimum off time
PWM to DC Conversion
Chop Frequency
PSRR, Spindle
(2)
(3)
(4)
100
% of full scale
KHz
dB
-
-
32
(1)The purpose of
toff min
is to guarantee a full rise and fall time of the spindle chopper output circuitry at the minimum supply voltage. The
timing circuit which determines
toff min
internally tracks the slew rate circuitry to keep this relationship true, while keeping
toff min
as
small as possible.
NOTE: dynamic current limit considerations will usually limit the off time even further.
(2) For the PWM to DC conversion, the following standard conditions apply:
Rpwm = 33K 5%
Input impedance of processor driver, 100 ohms
Assume driver is at 100% duty cycle
Rpwmdc = 100K 5%
Cdc = .0033
μ
F 5%
At these values, the output produces
toff min
at Vpwr = 10 volts so that full scale is reachable.
(3) With Rslew = 100K 1%, Cffc = 470 pF 5%, and including chip input capacitance, the output must not go below 20 Khz over the range of
toff min values.
(4) PSRR is defined as the ratio of average output voltage to the motor over the Vpwr change: -20log10(dVout/dVpwr)
It is tested by injecting a 0.6V peak square wave on Vpwr and Vdd from 1 Hz to 10 kHz. The specification applies over the entire Vpwr
range.
L6256
17/28
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| L6258 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PWM controlled high current DMOS universal motor driver |
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| L6258E | 功能描述:馬達/運動/點火控制器和驅(qū)動器 Dual Full Bridge RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Stepper Motor Controllers / Drivers 類型:2 Phase Stepper Motor Driver 工作電源電壓:8 V to 45 V 電源電流:0.5 mA 工作溫度:- 25 C to + 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HTSSOP-28 封裝:Tube |
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