參數(shù)資料
型號: KSZ8873FLLI
廠商: Micrel Inc
文件頁數(shù): 71/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產品培訓模塊: KSZ8873 Ethernet Switches
標準包裝: 160
控制器類型: 以太網(wǎng)開關控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
59
Revision 1.6
Register 13 (0x0D): Global Control 11
Bit
Name
R/W
Description
Default
7-6
Tag_0x7
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x7.
11
5-4
Tag_0x6
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x6.
11
3-2
Tag_0x5
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x5.
10
1-0
Tag_0x4
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x4.
10
Register 14 (0x0E): Global Control 12
Bit
Name
R/W
Description
Default
7
Unknown Packet Default
Port Enable
R/W
Send packets with unknown destination MAC addresses to specified
port(s) in bits [2:0] of this register.
=0, Disable
=1, Enable
0
6
Drive Strength of I/O
Pad
R/W
=1, 16mA
=0, 8mA
1
5
Reserved
R/W
Reserved
Do not change the default values.
0
4
Reserved
RO
Reserved
0
3
Reserved
R/W
Reserved
Do not change the default values.
0
2-0
Unknown Packet Default
Port
R/W
Specify which port(s) to send packets with unknown destination MAC
addresses. This feature is enabled by bit [7] of this register.
Bit 2 stands for port 3.
Bit 1 stands for port 2.
Bit 0 stands for port 1.
An ‘1’ includes a port.
An ‘0’ excludes a port.
111
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