參數(shù)資料
型號: KSZ8873FLLI
廠商: Micrel Inc
文件頁數(shù): 55/115頁
文件大小: 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產品培訓模塊: KSZ8873 Ethernet Switches
標準包裝: 160
控制器類型: 以太網(wǎng)開關控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
44
Revision 1.6
The following is a sample procedure for programming the KSZ8873MLL/FLL/RLL using the SPI bus:
1.
At the board level, connect the KSZ8873MLL/FLL/RLL pins as illustrated in Table 13:
Table 14. SPI Connections
KSZ8873MLL/FLL/RLL
Pin Number
KSZ8873MLL/FLL/RLL
Signal Name
External Processor
Signal Description
40
SPISN
SPI Slave Select
42
SCL (SPIC)
SPI Clock
43
SDA (SPID)
SPI Data (Master output; Slave input)
39
SPIQ
SPI Data (Master input; Slave output)
2.
Enable SPI slave mode by setting the KSZ8873MLL/FLL/RLL strap-in Pins P2LED[1:0] to “10”.
3.
Power up the board and assert reset to the KSZ8873MLL/FLL/RLL.
4.
Configure the desired register settings in the KSZ8873MLL/FLL/RLL, using the SPI write or multiple write command.
5.
Read back and verify the register settings in the KSZ8873MLL/FLL/RLL, using the SPI read or multiple read
command.
Some of the configuration settings, such as “Aging enable”, “Auto Negotiation Enable”, “Force Speed” and “Power down”
can be programmed after the switch has been started.
Figure 9 through Figure 12 illustrate the SPI data cycles for “Write”, “Read”, “Multiple Write” and “Multiple Read”. The read data
is registered out of SPIQ on the falling edge of SPIC, and the data input on SPID is registered on the rising edge of SPIC.
SPIQ
SPIC
SPID
SPIS_N
0
1
0
X
A7
A6
A5
A4
A3
A2
A1
A0
WRITE COMMAND
WRITE ADDRESS
WRITE DATA
D2
D0
D1
D3
D4
D5
D6
D7
Figure 9. SPI Write Data Cycle
SPIQ
SPIC
SPID
SPIS_N
0
1
X
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
READ COMMAND
READ ADDRESS
READ DATA
Figure 10. SPI Read Data Cycle
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