參數(shù)資料
型號(hào): KSZ8873FLLI
廠商: Micrel Inc
文件頁數(shù): 57/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
標(biāo)準(zhǔn)包裝: 160
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
46
Revision 1.6
Loopback Support
The KSZ8873MLL/FLL/RLL provides loopback support for remote diagnostic of failure. In loopback mode, the speed at
both PHY ports needs to be set to 100BASE-TX. Two types of loopback are supported: Far-end Loopback and Near-end
(Remote) Loopback.
Far-End Loopback
Far-end loopback is conducted between the KSZ8873MLL/FLL/RLL’s two PHY ports. The loopback is limited to a few
packages at a time for diagnosis purpose and cannot support large traffic. The loopback path starts at the “Originating.”
PHY port’s receive inputs (RXP/RXM), wraps around at the “l(fā)oopback” PHY port’s PMD/PMA, and ends at the
“Originating” PHY port’s transmit outputs (TXP/TXM).
Bit [0] of registers 29 and 45 is used to enable far-end loopback for ports 1 and 2, respectively. Alternatively, the MII
Management register 0, bit [14] can be used to enable far-end loopback.
The far-end loopback path is illustrated in Figure 13.
PMD/PMA
PCS
MAC
Switch
MAC
PCS
PMD/PMA
TXP /
TXM
RXP /
RXM
Originating
PHY Port
Loop Back
PHY Port
Figure 13. Far-End Loopback Path
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