參數資料
型號: KSZ8873FLLI
廠商: Micrel Inc
文件頁數: 70/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產品培訓模塊: KSZ8873 Ethernet Switches
標準包裝: 160
控制器類型: 以太網開關控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
58
Revision 1.6
Register 8 (0x08): Global Control 6
Bit
Name
R/W
Description
Default
7-0
Factory Testing
RO
Reserved
Do not change the default values.
0x00
Register 9 (0x09): Global Control 7
Bit
Name
R/W
Description
Default
7-0
Factory Testing
RO
Reserved
Do not change the default values.
0x24
Register 10 (0x0A): Global Control 8
Bit
Name
R/W
Description
Default
7-0
Factory Testing
RO
Reserved
Do not change the default values.
0x35
Register 11 (0x0B): Global Control 9
Bit
Name
R/W
Description
Default
7-6
CPU interface Clock
Selection
R/W
=00, 31.25MHz supports SPI speed below 6MHz
=01, 62.5MHz supports SPI speed between 6MHz to 12.5MHz
=10, 125MHz supports SPI speed above 12.5MHz
Note: Lower clock speed will save more power consumption, It is better set
to to 31.25MHz if SPI doesn’t request a high speed.
10
5-4
Reserved
RO
N/A Don’t change
00
3-2
Reserved
RO
N/A Don’t change
10
1
Reserved
RO
N/A Don’t change
0
Reserved
RO
N/A Don’t change
0
Register 12 (0x0C): Global Control 10
Bit
Name
R/W
Description
Default
7-6
Tag_0x3
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x3.
01
5-4
Tag_0x2
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x2.
01
3-2
Tag_0x1
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x1.
00
1-0
Tag_0x0
R/W
IEEE 802.1p mapping. The value in this field is used as the frame’s priority when its
IEEE 802.1p tag has a value of 0x0.
00
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