參數(shù)資料
型號(hào): KSZ8873FLLI
廠商: Micrel Inc
文件頁數(shù): 104/115頁
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 64LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
標(biāo)準(zhǔn)包裝: 160
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 576-3632
KSZ8873FLLI-ND
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
89
Revision 1.6
Register 195 (0xC3): Power Management and LED Mode
Bit
Name
R/W
Description
Default
7
CPU Interface
Power Down
R/W
CPU interface clock tree power down enable.
=1, Enable
=0, Disable
Note: Power save a little bit when MII interface is used and the traffic is
stopped in the power management with normal mode
0
6
Switch Power
Down
R/W
Switch clock tree power down enable.
=1, Enable
=0, Disable
Note: Power save a little bit when MII interface is used and the traffic is
stopped in the power management with normal mode
0
5-4
LED Mode
Selection
R/W
=00, LED0 -> Link/ACT, LED1-> Speed
=01, LED0 -> Link,
LED1 -> ACT
=10, LED0 -> Link/ACT, LED1 -> Duplex
=11, LED0 -> Link,
LED1 -> Duplex
Note:
Item
Pin State
LED Definition
No Link
H
OFF
Link
L
ON
100 Speed
L
ON
10 Speed
H
OFF (Link is ON)
Full Duplex
L
ON
Half Duplex
H
OFF (Link is ON)
ACT
Toggle
Blinking
00
3
LED Output
Mode
R/W
=1, The internal stretched energy signal from the analog module will be
negated and output to LED1 and the internal device ready signal will be
negated and output to LED0.
=0, The LED1/LED0 pins will indicate the regular LED outputs.
(Note. This is for debugging purpose.)
0
2
PLL Off Enable
R/W
=1, PLL power down enable
=0, Disable
Note: This bit is used in Energy Detect mode with Pin 27 MII_LINK_3 pull-up
in the by-pass mode for saving power
0
1-0
Power
Management
Mode
R/W
Power management mode
=00, Normal Mode
=01, Energy Detection Mode
=10, Software Power Down Mode
=11, Power Saving Mode
00
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