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參數(shù)資料
| 型號(hào)： | KSZ8873FLLI |
| 廠(chǎng)商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 40/115頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ETHERNET SWITCH 3PORT 64LQFP |
| 產(chǎn)品培訓(xùn)模塊： | KSZ8873 Ethernet Switches |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 控制器類(lèi)型： | 以太網(wǎng)開(kāi)關(guān)控制器 |
| 接口： | MII |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤(pán) |
| 其它名稱(chēng)： | 576-3632 KSZ8873FLLI-ND |
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Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
30
Revision 1.6
Switching Engine
The KSZ8873MLL/FLL/RLL features a high-performance switching engine to move data to and from the MACs’ packet
buffers. It operates in store and forward mode, while the efficient switching mechanism reduces overall latency.
The switching engine has a 32kB internal frame buffer. This buffer pool is shared between all three ports. There are a total
of 256 buffers available. Each buffer is sized at 128 bytes.
MAC Operation
The KSZ8873MLL/FLL/RLL strictly abides by IEEE 802.3 standards to maximize compatibility.
Inter Packet Gap (IPG)
If a frame is successfully transmitted, the 96 bits time IPG is measured between the two consecutive MTXEN. If the
current packet is experiencing collision, the 96 bits time IPG is measured from MCRS and the next MTXEN.
Back-Off Algorithm
The KSZ8873MLL/FLL/RLL implements the IEEE 802.3 standard for the binary exponential back-off algorithm, and
optional "aggressive mode" back-off. After 16 collisions, the packet is optionally dropped depending on the switch
configuration for Register 4 (0x04) bit [3].
Late Collision
If a transmit packet experiences collisions after 512 bit times of the transmission, the packet is dropped.
Illegal Frames
The KSZ8873MLL/FLL/RLL discards frames less than 64 bytes, and can be programmed to accept frames up to1518
bytes, 1536 bytes or 1916 bytes. These maximum frame size settings are programmed in Register 4 (0x04). Since the
KSZ8873MLL/FLL/RLL supports VLAN tags, the maximum sizing is adjusted when these tags are present.
Full Duplex Flow Control
The KSZ8873MLL/FLL/RLL supports standard IEEE 802.3x flow control frames on both transmit and receive sides.
On the receive side, if the KSZ8873MLL/FLL/RLL receives a pause control frame, the KSZ8873MLL/FLL/RLL will not
transmit the next normal frame until the timer, specified in the pause control frame, expires. If another pause frame is
received before the current timer expires, the timer will be updated with the new value in the second pause frame. During
this period (while it is flow controlled), only flow control packets from the KSZ8873MLL/FLL/RLL are transmitted.
On the transmit side, the KSZ8873MLL/FLL/RLL has intelligent and efficient ways to determine when to invoke flow
control. The flow control is based on availability of the system resources, including available buffers, available transmit
queues and available receive queues.
The KSZ8873MLL/FLL/RLL will flow control a port that has just received a packet if the destination port resource is busy.
The KSZ8873MLL/FLL/RLL issues a flow control frame (XOFF), containing the maximum pause time defined by the IEEE
802.3x standard. Once the resource is freed up, the KSZ8873MLL/FLL/RLL sends out the other flow control frame (XON)
with zero pause time to turn off the flow control (turn on transmission to the port). A hysteresis feature is provided to
prevent the flow control mechanism from being constantly activated and deactivated.
The KSZ8873MLL/FLL/RLL flow controls all ports if the receive queue becomes full.
Half-Duplex Backpressure
A half-duplex backpressure option (not in IEEE 802.3 standards) is also provided. The activation and deactivation
conditions are the same as full duplex flow control. If backpressure is required, the KSZ8873MLL/FLL/RLL sends
preambles to defer the other stations' transmission (carrier sense deference).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8873MLL | 功能描述:以太網(wǎng) IC 3-Port Fast Ethernet Switch with 1x MII Interface - Lead Free RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8873MLL AM | 功能描述:以太網(wǎng) IC 3-Port 10/100 Ethernet Switch with 1x MII Interface (Automotive Grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8873MLL AM TR | 功能描述:以太網(wǎng) IC 3-Port 10/100 Ethernet Switch with 1x MII Interface (Automotive Grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8873MLL/8863MLL | 制造商:Micrel Inc 功能描述:EVAL BOARD |
| KSZ8873MLL_09 | 制造商:MICREL 制造商全稱(chēng):Micrel Semiconductor 功能描述:Integrated 3-Port 10/100 Managed Switch with PHYs |
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