參數(shù)資料
型號: KSZ8841-16MQL-EVAL
廠商: Micrel Inc
文件頁數(shù): 84/105頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8841-16MQL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8841-16MQL
主要屬性: 1 個端口,100BASE-TX/10BASE-T
次要屬性: 8/16 位接口,LinkMD 線纜診斷
已供物品: 板,CD,文檔,電源
相關(guān)產(chǎn)品: KSZ8841-16MQL A6-ND - IC MAC CTRLR 8/16BIT 128-PQFP
576-2115-ND - IC MAC CTRLR 32BIT 128-PQFP
576-2112-ND - IC MAC CTRLR 8/16BIT 128-PQFP
其它名稱: 576-1631
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
8
M9999-102207-1.6
List of Figures
Figure 1. KSZ8841M Functional Diagram............................................................................................................................... 1
Figure 2. Standard – KSZ8841-16MQL 128-Pin PQFP ........................................................................................................ 10
Figure 3. Option – KSZ8841-16MVL 128-Pin LQFP............................................................................................................. 10
Figure 4. KSZ8841-16MBL 100-Ball LFBGA (Top View)...................................................................................................... 11
Figure 5. Standard – KSZ8841-32MQL 128-Pin PQFP ........................................................................................................ 21
Figure 6. Option – KSZ8841-32MVL 128-Pin LQFP............................................................................................................. 21
Figure 7. Typical Straight Cable Connection ........................................................................................................................ 30
Figure 8. Typical Crossover Cable Connection .................................................................................................................... 30
Figure 9. Auto Negotiation and Parallel Operation ............................................................................................................... 31
Figure 10. Mapping from the ISA, EISA, and VLBus to the KSZ8841M Bus Interface......................................................... 37
Figure 11. KSZ8841M 8-Bit, 16-Bit, and 32-Bit Data Bus Connections................................................................................ 37
Figure 12. PHY Port 1 Near-end (Remote) Loopback Path.................................................................................................. 42
Figure 13. Asynchronous Cycle – ADSN = 0 ........................................................................................................................ 89
Figure 14. Asynchronous Cycle – Using ADSN.................................................................................................................... 90
Figure 15. Asynchronous Cycle – Using DATACSN............................................................................................................. 91
Figure 16. Address Latching Cycle for All Modes ................................................................................................................. 92
Figure 17. Synchronous Burst Write Cycles – VLBUSN = 1................................................................................................. 93
Figure 18. Synchronous Burst Read Cycles – VLBUSN = 1 ................................................................................................ 94
Figure 19. Synchronous Write Cycle – VLBUSN = 0 ............................................................................................................ 95
Figure 20. Synchronous Read Cycle – VLBUSN = 0............................................................................................................ 96
Figure 21. Auto Negotiation Timing....................................................................................................................................... 97
Figure 22. Reset Timing........................................................................................................................................................ 98
Figure 23. EEPROM Read Cycle Timing Diagram .............................................................................................................. 99
Figure 24. 128-Pin PQFP Package..................................................................................................................................... 101
Figure 25. Optional 128-Pin LQFP Package....................................................................................................................... 102
Figure 26. Optional 100-Ball LFBGA Package ................................................................................................................... 103
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