參數(shù)資料
型號(hào): KSZ8841-16MQL-EVAL
廠商: Micrel Inc
文件頁(yè)數(shù): 82/105頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8841-16MQL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8841-16MQL
主要屬性: 1 個(gè)端口,100BASE-TX/10BASE-T
次要屬性: 8/16 位接口,LinkMD 線纜診斷
已供物品: 板,CD,文檔,電源
相關(guān)產(chǎn)品: KSZ8841-16MQL A6-ND - IC MAC CTRLR 8/16BIT 128-PQFP
576-2115-ND - IC MAC CTRLR 32BIT 128-PQFP
576-2112-ND - IC MAC CTRLR 8/16BIT 128-PQFP
其它名稱: 576-1631
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
78
M9999-102207-1.6
Bank 45 PHY 1 PHYID High Register (0x06): PHY1IHR
This register contains the PHY ID (high) for the chip.
Bit
Default
R/W
Description
15-0
0x0022
RO
PHYID High
High order PHYID bits.
Bank 45 PHY 1 Auto-Negotiation Advertisement Register (0x08): P1ANAR
This register contains the auto-negotiation advertisement for the PHY function.
Bit
Default
R/W
Description
Bit is same as:
15
0
RO
Next page
Not supported.
14
0
RO
Reserved
13
0
RO
Remote fault
Not supported.
12-11
0
RO
Reserved
10
1
RW
Pause (flow control capability)
1 = advertise pause capability.
0 = do not advertise pause capability.
Bank49 0x2 bit4
9
0
RW
Reserved.
8
1
RW
Adv 100 Full
1 = advertise 100 full-duplex capability.
0 = do not advertise 100 full-duplex capability
Bank49 0x2 bit3
7
1
RW
Adv 100 Half
1= advertise 100 half-duplex capability.
0 = do not advertise 100 half-duplex capability.
Bank49 0x2 bit2
6
1
RW
Adv 10 Full
1 = advertise 10 full-duplex capability.
0 = do not advertise 10 full-duplex capability.
Bank49 0x2 bit1
5
1
RW
Adv 10 Half
1 = advertise 10 half-duplex capability.
0 = do not advertise 10 half-duplex capability.
Bank49 0x2 bit0
4-0
0x01
RO
Selector Field
802.3
Bank 45 PHY 1 Auto-Negotiation Link Partner Ability Register (0x0A): P1ANLPR
This register contains the auto-negotiation link partner ability for the chip function.
Bit
Default
R/W
Description
Bit is same as:
15
0
RO
Next page
Not supported.
14
0
RO
LP ACK
Not supported.
13
0
RO
Remote fault
Not supported.
12-11
0
RO
Reserved
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