參數(shù)資料
型號: KSZ8841-16MQL-EVAL
廠商: Micrel Inc
文件頁數(shù): 81/105頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8841-16MQL
標準包裝: 1
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8841-16MQL
主要屬性: 1 個端口,100BASE-TX/10BASE-T
次要屬性: 8/16 位接口,LinkMD 線纜診斷
已供物品: 板,CD,文檔,電源
相關產(chǎn)品: KSZ8841-16MQL A6-ND - IC MAC CTRLR 8/16BIT 128-PQFP
576-2115-ND - IC MAC CTRLR 32BIT 128-PQFP
576-2112-ND - IC MAC CTRLR 8/16BIT 128-PQFP
其它名稱: 576-1631
Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
77
M9999-102207-1.6
Bank 45 PHY 1 MII-Register Basic Status Register (0x02): P1MBSR
This register contains the MII register status for the chip function.
Bit
Default
R/W
Description
Bit is same as:
15
0
RO
T4 Capable
1 = 100 BASE-T4 capable.
0 = not 100 BASE-T4 capable.
14
1
RO
100 Full Capable
1 = 100BASE-TX full-duplex capable.
0 = not 100BASE-TX full duplex.capable.
13
1
RO
100 Half Capable
1= 100BASE-TX half-duplex capable.
0= not 100BASE-TX half-duplex capable.
12
1
RO
10 Full Capable
1 = 10BASE-T full-duplex capable.
0 = not 10BASE-T full-duplex capable.
11
1
RO
10 Half Capable
1 = 10BASE-T half-duplex capable.
0 = not 10BASE-T half-duplex capable.
10-7
0
RO
Reserved.
6
0
RO
Preamble suppressed
Not supported.
5
0
RO
AN Complete
1 = auto-negotiation complete.
0 = auto-negotiation not completed.
Bank49 0x4 bit6
4
0
RO
Reserved
Bank49 0x4 bit8
3
1
RO
AN Capable
1 = auto-negotiation capable.
0 = not auto-negotiation capable.
2
0
RO
Link Status
1 = link is up.
0 = link is down.
Bank49 0x4 bit5
1
0
RO
Jabber test
Not supported.
0
RO
Extended Capable
1 = extended register capable.
0 = not extended register capable.
Bank 45 PHY 1 PHYID Low Register (0x04): PHY1ILR
This register contains the PHY ID (low) for the chip.
Bit
Default
R/W
Description
15-0
0x1430
RO
PHYID Low
Low order PHYID bits.
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