Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
4
M9999-102207-1.6
Contents
General Description .............................................................................................................................................................. 1
Functional Diagram............................................................................................................................................................... 1
Features ................................................................................................................................................................................. 2
Network Features ........................................................................................................................................................... 2
Power Modes, Power Supplies, and Packaging............................................................................................................. 2
Applications........................................................................................................................................................................... 2
Markets................................................................................................................................................................................... 2
Ordering Information ............................................................................................................................................................ 3
Revision History .................................................................................................................................................................... 3
Pin Configuration for KSZ8841-16 Chip (8/16-Bit) ........................................................................................................... 10
Ball Configuration for KSZ8841-16 Chip (8/16-Bit) .......................................................................................................... 11
Pin Description for KSZ8841-16 Chip (8/16-Bit) ............................................................................................................... 12
Ball Description for KSZ8841-16 Chip (8/16-Bit) .............................................................................................................. 17
Pin Configuration for KSZ8841-32 Chip (32-Bit) .............................................................................................................. 21
Pin Description for KSZ8841-32 Chip (32-Bit) .................................................................................................................. 22
Functional Description ....................................................................................................................................................... 27
Functional Overview ........................................................................................................................................................... 27
Power Management ..................................................................................................................................................... 27
Power down ............................................................................................................................................................................... 27
Wake-on-LAN............................................................................................................................................................................. 27
Link Change ............................................................................................................................................................................... 27
Wake-up Packet......................................................................................................................................................................... 27
Magic Packet.............................................................................................................................................................................. 27
Physical Layer Transceiver (PHY)................................................................................................................................ 28
100BASE-TX Transmit............................................................................................................................................................... 28
100BASE-TX Receive................................................................................................................................................................ 29
PLL Clock Synthesizer (Recovery)............................................................................................................................................. 29
Scrambler/De-scrambler (100BASE-TX Only) ........................................................................................................................... 29
10BASE-T Transmit ................................................................................................................................................................... 29
10BASE-T Receive .................................................................................................................................................................... 29
MDI/MDI-X Auto Crossover........................................................................................................................................................ 29
Straight Cable........................................................................................................................................................................ 30
Crossover Cable.................................................................................................................................................................... 30
Auto Negotiation......................................................................................................................................................................... 31
LinkMD Cable Diagnostics ......................................................................................................................................................... 32
Access................................................................................................................................................................................... 32
Usage .................................................................................................................................................................................... 32
Media Access Control (MAC) Operation ...................................................................................................................... 32
Inter Packet Gap (IPG)............................................................................................................................................................... 32
Back-Off Algorithm ..................................................................................................................................................................... 32
Late Collision.............................................................................................................................................................................. 32
Flow Control ............................................................................................................................................................................... 32
Half-Duplex Backpressure ......................................................................................................................................................... 33
Clock Generator ......................................................................................................................................................................... 33
Bus Interface Unit (BIU)................................................................................................................................................ 33
Supported Transfers .................................................................................................................................................................. 33
Physical Data Bus Size .............................................................................................................................................................. 33
Asynchronous Interface ............................................................................................................................................................. 35
Synchronous Interface ............................................................................................................................................................... 36
BIU Summation .......................................................................................................................................................................... 36
BIU Implementation Principles ................................................................................................................................................... 37
Queue Management Unit (QMU).................................................................................................................................. 38
Transmit Queue (TXQ) Frame Format ....................................................................................................................................... 38