參數(shù)資料
型號(hào): KM418RD4AD
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM
中文描述: 128/144Mbit RDRAM的256 × 16/18位× 2 * 16屬銀行直接RDRAMTM
文件頁(yè)數(shù): 37/64頁(yè)
文件大小: 4052K
代理商: KM418RD4AD
Page 34
KM416RD8AC(D)/KM418RD8AC(D)
Direct RDRAM
Rev. 1.01 Oct. 1999
Figure 32: REFB Register
Figure 33: CCA Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
REFB4..REFB0
Read/write register.
Reset value is zero (from SETR/CLRR).
Refresh Bank register.
REFB4..REFB0 is the bank that will be refreshed next
during self-refresh. REFB4..0 is incremented after each
self-refresh activate and precharge operation pair.
Control Register: REFB
Address: 041
16
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
CCA6..CCA0
ASYMA
0
Read/write register.
Reset value is zero (SETR/CLRR or SIO Reset).
CCA6..CCA0 - Current Control A. Controls the I
OL
output current for the DQA8..DQA0 pins.
ASYMA0 control the asymmetry of the V
OL
/V
OH
voltage swing about the V
REF
reference voltage for the
DQA8..0 pins.
Control Register: CCA
Address: 043
16
Figure 34: REFR Register
Figure 35: CCB Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
REFR8..REFR0
Read/write register.
Reset value is zero (from SETR/CLRR).
Refresh Row register.
REFR8..REFR0 is the row that will be refreshed next
by the REFA command or by self-refresh. REFR8..0 is
incremented when BR4..0=11111 for the REFA
command. REFR8..0 is incremented when
REFB4..0=11111 for self-refresh.
Control Register: REFR
Address: 042
16
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
CCB6.CCB0
ASYMB
0
Read/write register.
Reset value is zero (SETR/CLRR or SIO Reset).
CCB6..CCB0 - Current Control B. Controls the I
OL
output current for the DQB8..DQB0 pins.
ASYMB0 control the asymmetry of the V
OL
/V
OH
voltage swing about the V
REF
reference voltage for the
DQB8..0 pins.
Control Register: CCB
Address: 044
16
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