參數(shù)資料
型號(hào): KM418RD4AD
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128/144Mbit RDRAM 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM
中文描述: 128/144Mbit RDRAM的256 × 16/18位× 2 * 16屬銀行直接RDRAMTM
文件頁(yè)數(shù): 36/64頁(yè)
文件大小: 4052K
代理商: KM418RD4AD
Page 33
KM416RD8AC(D)/KM418RD8AC(D)
Direct RDRAM
Rev. 1.01 Oct. 1999
. .
Read-only register.
Figure 29: CNFGB Register
15 14 13 12 11 10
SVER5..0
= 00000
9
8
7
6
5
4
3
DEVTYP2..0
= 000
2
1
0
BYT
B
CORG4..0
= 00100
SPT
1
Control Register: CNFGB
Address: 024
16
BYT - Byte width. B=1 means the device reads and
writes 9-bit memory bytes. B=0 means 8 bits.
DEVTYP2..0 - Device type. DEVTYP = 000 means
that this device is an RDRAM.
SPT - Split-core. SPT=1 means the core is split, SPT=0 means it is not.
CORG4..0 - Core organization. This field specifies the number of bank
(5 bits), row (9 bits), and column (6 bits) address bits.
SVER5..0 - Stepping version. Specifies the mask version number of this
device.
Figure 30: TEST Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Read/write register.
Reset value of TEST34 is zero (from SIO Reset)
This register are used for testing purposes. It must not
be read or written after SIO Reset.
Control Register: TEST34
Address: 022
16
0
0
Figure 31: DEVID Register
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
DEVID4..DEVID0
0
0
0
0
0
0
0
0
0
0
Read/write register.
Reset value is undefined.
Device Identification register.
DEVID4..DEVID0 is compared to DR4..DR0,
DC4..DC0, and DX4..DX0 fields for all memory read
or write transactions. This determines which RDRAM
is selected for the memory read or write transaction.
Control Register: DEVID
Address: 040
16
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