參數(shù)資料
型號: KM29W040AT
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512K x 8 bit NAND Flash Memory
中文描述: 為512k × 8位NAND快閃記憶體
文件頁數(shù): 11/22頁
文件大小: 359K
代理商: KM29W040AT
KM29W040AT, KM29W040AIT
FLASH MEMORY
11
System Interface Using CE don’t-care.
CE
WE
t
WP
t
CH
t
CS
Start Add.(3Cycle)
80H
Data Input
CE
CLE
ALE
WE
I/O
0
~
7
Data Input
CE don’-care
10H
For a easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal
32byte page registers are utilized as seperate buffers for this operation and the system design gets more flexible. In addition, for
voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading and read-
ing would provide significant savings in power consumption.
Start Add.(3Cycle)
00H
CE
CLE
ALE
WE
I/O
0
~
7
Data Output(sequential)
CE don’-care
R/B
t
R
RE
t
CEA
out
t
REA
(Max. 60ns)
CE
RE
I/O
0
~
7
Timing requirements : If CE is is exerted high during sequential
data-reading, the falling edge of CE to valid data(tCEA) must
be kept greater than 60ns.
Figure 3. Program Operation with CE don’t-care.
Figure 4. Read Operation with CE don’t-care.
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