OneNAND512/OneNAND1GDDP
FLASH MEMORY
52
Program Operation
The device can be programmed in data unit. Programming is writing 0's into the memory array by executing the internal program rou-
tine. In order to perform the Internal Program Routine, command sequence is necessary. First, host sets the address of the Buffer-
RAM and the memory location and loads the data to be programmed into the BufferRAM. Second, program command initiates the
internal program routine. During the execution of the Routine, the host is not required to provide further controls or timings. During the
Internal Program Routine, commands except reset command written to the device will be ignored.
Note that a reset during a program operation will cause data corruption at the corresponding location.
The device provides dual data buffer memory architecture. The device is capable of data-write operation from host to one of data buff-
ers during program operation from anther data buffer to Flash simultaneously. Refer to the information for more details in "Read while
Load operation".
Figure 14. Program operation flow-chart
Start
Data Input
Completed
Write ’DFS*, FBA’ of Flash
Add: F100h DQ=DFS*’, FBA
Write ’FPA, FSA’ of Flash
Add: F107h DQ=FPA, FSA
Select DataRAM for DDP
1)
Add: F101h DQ=DBS*
Write Data into DataRAM
2)
ADD: DP DQ=Data-in
Program completed
Write ’Program’ Command
Add: F220h
DQ=0080h or 001Ah
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
Read Controller
Status Register
Add: F240h DQ[10]=WR
C
DQ[10]=0
Program Error
YES
NO
NO
YES
* DBS, DFS is for DDP
: If program operation results in an error, map out
the block including the page in error and copy the
target data to another block.
*
Note 1) This must happen before data input
2) Data input could be done anywhere between "Start" and "Write Program Command".
Write 0 to interrupt register
Add: F241h DQ=0000h
Write ’BSA, BSC’ of DataRAM
Add: F200h DQ=BSA, BSC