參數(shù)資料
型號(hào)： ISP1761BE,551
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù)： 22/164頁
文件大?。?/td> 767K
代理商： ISP1761BE,551
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
117 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
10.7.2 DMA Transfer Counter register
This 4 bytes register sets up the total byte count for a DMA transfer (DMACR). It indicates
the remaining number of bytes left for transfer. The bit allocation is given in Table 127.
For IN endpoint — Because there is a FIFO in the ISP1761 DMA controller, some data
may remain in the FIFO during the DMA transfer. The maximum FIFO size is 8 bytes, and
the maximum delay time for the data to be shifted to endpoint buffer is 60 ns.
For OUT endpoint — Data will not be cleared for the endpoint buffer, until all the data has
been read from the DMA FIFO.
Table 125. DMA Command register (address 0230h) bit description
Bit
Symbol
Description
7 to 0
DMA_CMD[7:0]
DMA command code; see Table 126.
Table 126. DMA commands
Code
Name
Description
00h
GDMA Read
Generic DMA IN token transfer: Data is transferred from the
external DMA bus to the internal buffer.
01h
GDMA Write
Generic DMA OUT token transfer: Data is transferred from the
internal buffer to the external DMA bus.
02h to 0Dh -
reserved
0Eh
Validate Buffer
Validate Buffer (for debugging only): Request from the
microcontroller to validate the endpoint buffer, following a
DMA-to-USB data transfer.
0Fh
Clear Buffer
Clear Buffer: Request from the microcontroller to clear the endpoint
buffer, after a DMA-to-USB data transfer. Logic 1 clears the TX
buffer of the indexed endpoint; the RX buffer is not affected. The TX
buffer is automatically cleared once data is sent on the USB bus.
This bit is set only when it is necessary to forcefully clear the buffer.
Remark: If using double buffer, to clear both the buffers issue the
Clear Buffer command two times, that is, set and clear this bit two
times.
10h
-
reserved
11h
Reset DMA
Reset DMA: Initializes the DMA core to its power-on reset state.
Remark: When the DMA core is reset during the Reset DMA
command, the DREQ, DACK, RD_N and WR_N handshake pins
will temporarily be asserted. This can confuse the external DMA
controller. To prevent this, start the external DMA controller only
after the DMA reset.
12h
-
reserved
13h
GDMA Stop
GDMA stop: This command stops the GDMA data transfer. Any
data in the OUT endpoint that is not transferred by the DMA will
remain in the buffer. The FIFO data for the IN endpoint will be
written to the endpoint buffer. An interrupt bit will be set to indicate
that the DMA Stop command is complete.
14h to FFh
-
reserved
相關(guān)PDF資料
PDF描述
ISP1761BE,518 UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
ITR8307 SPECIALTY OPTOELECTRONIC DEVICE
IXF1010 10 CHANNEL(S), 1000M bps, LOCAL AREA NETWORK CONTROLLER, CBGA552
JANTX1N3595US-1 0.15 A, SILICON, SIGNAL DIODE
JAN1N3595US-1 0.15 A, SILICON, SIGNAL DIODE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1761BEGE 功能描述:IC USB CTRL HI-SPEED 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1761BE-S 功能描述:IC USB CONTROLLER 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1761BE-T 功能描述:USB 接口集成電路 USB HS OTG CNTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BEUM 功能描述:IC USB OTG CONTROLLER HS 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1761ET 功能描述:USB 接口集成電路 USB 2.0 HS OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*